hpm_linv2_regs.h File Reference

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Data Structures
struct	LINV2_Type

Macros
#define	LINV2_DATA_DATA_MASK   (0xFFFFFFFFUL)
#define	LINV2_DATA_DATA_SHIFT   (0U)
#define	LINV2_DATA_DATA_SET(x)   (((uint32_t)(x) << LINV2_DATA_DATA_SHIFT) & LINV2_DATA_DATA_MASK)
#define	LINV2_DATA_DATA_GET(x)   (((uint32_t)(x) & LINV2_DATA_DATA_MASK) >> LINV2_DATA_DATA_SHIFT)
#define	LINV2_DATA_BYTE_DATA_BYTE_MASK   (0xFFU)
#define	LINV2_DATA_BYTE_DATA_BYTE_SHIFT   (0U)
#define	LINV2_DATA_BYTE_DATA_BYTE_SET(x)   (((uint8_t)(x) << LINV2_DATA_BYTE_DATA_BYTE_SHIFT) & LINV2_DATA_BYTE_DATA_BYTE_MASK)
#define	LINV2_DATA_BYTE_DATA_BYTE_GET(x)   (((uint8_t)(x) & LINV2_DATA_BYTE_DATA_BYTE_MASK) >> LINV2_DATA_BYTE_DATA_BYTE_SHIFT)
#define	LINV2_DATA_LEN_ID_CHECKSUM_MASK   (0xFF0000UL)
#define	LINV2_DATA_LEN_ID_CHECKSUM_SHIFT   (16U)
#define	LINV2_DATA_LEN_ID_CHECKSUM_GET(x)   (((uint32_t)(x) & LINV2_DATA_LEN_ID_CHECKSUM_MASK) >> LINV2_DATA_LEN_ID_CHECKSUM_SHIFT)
#define	LINV2_DATA_LEN_ID_ID_PARITY_MASK   (0xC000U)
#define	LINV2_DATA_LEN_ID_ID_PARITY_SHIFT   (14U)
#define	LINV2_DATA_LEN_ID_ID_PARITY_GET(x)   (((uint32_t)(x) & LINV2_DATA_LEN_ID_ID_PARITY_MASK) >> LINV2_DATA_LEN_ID_ID_PARITY_SHIFT)
#define	LINV2_DATA_LEN_ID_ID_MASK   (0x3F00U)
#define	LINV2_DATA_LEN_ID_ID_SHIFT   (8U)
#define	LINV2_DATA_LEN_ID_ID_SET(x)   (((uint32_t)(x) << LINV2_DATA_LEN_ID_ID_SHIFT) & LINV2_DATA_LEN_ID_ID_MASK)
#define	LINV2_DATA_LEN_ID_ID_GET(x)   (((uint32_t)(x) & LINV2_DATA_LEN_ID_ID_MASK) >> LINV2_DATA_LEN_ID_ID_SHIFT)
#define	LINV2_DATA_LEN_ID_ENH_CHECK_MASK   (0x80U)
#define	LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT   (7U)
#define	LINV2_DATA_LEN_ID_ENH_CHECK_SET(x)   (((uint32_t)(x) << LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT) & LINV2_DATA_LEN_ID_ENH_CHECK_MASK)
#define	LINV2_DATA_LEN_ID_ENH_CHECK_GET(x)   (((uint32_t)(x) & LINV2_DATA_LEN_ID_ENH_CHECK_MASK) >> LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT)
#define	LINV2_DATA_LEN_ID_DATA_LEN_MASK   (0xFU)
#define	LINV2_DATA_LEN_ID_DATA_LEN_SHIFT   (0U)
#define	LINV2_DATA_LEN_ID_DATA_LEN_SET(x)   (((uint32_t)(x) << LINV2_DATA_LEN_ID_DATA_LEN_SHIFT) & LINV2_DATA_LEN_ID_DATA_LEN_MASK)
#define	LINV2_DATA_LEN_ID_DATA_LEN_GET(x)   (((uint32_t)(x) & LINV2_DATA_LEN_ID_DATA_LEN_MASK) >> LINV2_DATA_LEN_ID_DATA_LEN_SHIFT)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK   (0x200000UL)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT   (21U)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT) & LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_DIS_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK) >> LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_MASK   (0x100000UL)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_SHIFT   (20U)
#define	LINV2_CONTROL_STATUS_BREAK_ERR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_BREAK_ERR_MASK) >> LINV2_CONTROL_STATUS_BREAK_ERR_SHIFT)
#define	LINV2_CONTROL_STATUS_PARITY_ERROR_MASK   (0x80000UL)
#define	LINV2_CONTROL_STATUS_PARITY_ERROR_SHIFT   (19U)
#define	LINV2_CONTROL_STATUS_PARITY_ERROR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_PARITY_ERROR_MASK) >> LINV2_CONTROL_STATUS_PARITY_ERROR_SHIFT)
#define	LINV2_CONTROL_STATUS_TIME_OUT_MASK   (0x40000UL)
#define	LINV2_CONTROL_STATUS_TIME_OUT_SHIFT   (18U)
#define	LINV2_CONTROL_STATUS_TIME_OUT_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_TIME_OUT_MASK) >> LINV2_CONTROL_STATUS_TIME_OUT_SHIFT)
#define	LINV2_CONTROL_STATUS_CHK_ERROR_MASK   (0x20000UL)
#define	LINV2_CONTROL_STATUS_CHK_ERROR_SHIFT   (17U)
#define	LINV2_CONTROL_STATUS_CHK_ERROR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_CHK_ERROR_MASK) >> LINV2_CONTROL_STATUS_CHK_ERROR_SHIFT)
#define	LINV2_CONTROL_STATUS_BIT_ERROR_MASK   (0x10000UL)
#define	LINV2_CONTROL_STATUS_BIT_ERROR_SHIFT   (16U)
#define	LINV2_CONTROL_STATUS_BIT_ERROR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_BIT_ERROR_MASK) >> LINV2_CONTROL_STATUS_BIT_ERROR_SHIFT)
#define	LINV2_CONTROL_STATUS_LIN_ACTIVE_MASK   (0x8000U)
#define	LINV2_CONTROL_STATUS_LIN_ACTIVE_SHIFT   (15U)
#define	LINV2_CONTROL_STATUS_LIN_ACTIVE_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_LIN_ACTIVE_MASK) >> LINV2_CONTROL_STATUS_LIN_ACTIVE_SHIFT)
#define	LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_MASK   (0x4000U)
#define	LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_SHIFT   (14U)
#define	LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_MASK) >> LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_SHIFT)
#define	LINV2_CONTROL_STATUS_ABORTED_MASK   (0x2000U)
#define	LINV2_CONTROL_STATUS_ABORTED_SHIFT   (13U)
#define	LINV2_CONTROL_STATUS_ABORTED_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_ABORTED_MASK) >> LINV2_CONTROL_STATUS_ABORTED_SHIFT)
#define	LINV2_CONTROL_STATUS_DATA_REQ_MASK   (0x1000U)
#define	LINV2_CONTROL_STATUS_DATA_REQ_SHIFT   (12U)
#define	LINV2_CONTROL_STATUS_DATA_REQ_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_DATA_REQ_MASK) >> LINV2_CONTROL_STATUS_DATA_REQ_SHIFT)
#define	LINV2_CONTROL_STATUS_INT_MASK   (0x800U)
#define	LINV2_CONTROL_STATUS_INT_SHIFT   (11U)
#define	LINV2_CONTROL_STATUS_INT_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_INT_MASK) >> LINV2_CONTROL_STATUS_INT_SHIFT)
#define	LINV2_CONTROL_STATUS_ERROR_MASK   (0x400U)
#define	LINV2_CONTROL_STATUS_ERROR_SHIFT   (10U)
#define	LINV2_CONTROL_STATUS_ERROR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_ERROR_MASK) >> LINV2_CONTROL_STATUS_ERROR_SHIFT)
#define	LINV2_CONTROL_STATUS_WAKEUP_MASK   (0x200U)
#define	LINV2_CONTROL_STATUS_WAKEUP_SHIFT   (9U)
#define	LINV2_CONTROL_STATUS_WAKEUP_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_WAKEUP_MASK) >> LINV2_CONTROL_STATUS_WAKEUP_SHIFT)
#define	LINV2_CONTROL_STATUS_COMPLETE_MASK   (0x100U)
#define	LINV2_CONTROL_STATUS_COMPLETE_SHIFT   (8U)
#define	LINV2_CONTROL_STATUS_COMPLETE_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_COMPLETE_MASK) >> LINV2_CONTROL_STATUS_COMPLETE_SHIFT)
#define	LINV2_CONTROL_STATUS_STOP_MASK   (0x80U)
#define	LINV2_CONTROL_STATUS_STOP_SHIFT   (7U)
#define	LINV2_CONTROL_STATUS_STOP_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_STOP_SHIFT) & LINV2_CONTROL_STATUS_STOP_MASK)
#define	LINV2_CONTROL_STATUS_STOP_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_STOP_MASK) >> LINV2_CONTROL_STATUS_STOP_SHIFT)
#define	LINV2_CONTROL_STATUS_SLEEP_MASK   (0x40U)
#define	LINV2_CONTROL_STATUS_SLEEP_SHIFT   (6U)
#define	LINV2_CONTROL_STATUS_SLEEP_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_SLEEP_SHIFT) & LINV2_CONTROL_STATUS_SLEEP_MASK)
#define	LINV2_CONTROL_STATUS_SLEEP_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_SLEEP_MASK) >> LINV2_CONTROL_STATUS_SLEEP_SHIFT)
#define	LINV2_CONTROL_STATUS_TRANSMIT_MASK   (0x20U)
#define	LINV2_CONTROL_STATUS_TRANSMIT_SHIFT   (5U)
#define	LINV2_CONTROL_STATUS_TRANSMIT_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_TRANSMIT_SHIFT) & LINV2_CONTROL_STATUS_TRANSMIT_MASK)
#define	LINV2_CONTROL_STATUS_TRANSMIT_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_TRANSMIT_MASK) >> LINV2_CONTROL_STATUS_TRANSMIT_SHIFT)
#define	LINV2_CONTROL_STATUS_DATA_ACK_MASK   (0x10U)
#define	LINV2_CONTROL_STATUS_DATA_ACK_SHIFT   (4U)
#define	LINV2_CONTROL_STATUS_DATA_ACK_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_DATA_ACK_SHIFT) & LINV2_CONTROL_STATUS_DATA_ACK_MASK)
#define	LINV2_CONTROL_STATUS_DATA_ACK_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_DATA_ACK_MASK) >> LINV2_CONTROL_STATUS_DATA_ACK_SHIFT)
#define	LINV2_CONTROL_STATUS_RESET_INT_MASK   (0x8U)
#define	LINV2_CONTROL_STATUS_RESET_INT_SHIFT   (3U)
#define	LINV2_CONTROL_STATUS_RESET_INT_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_RESET_INT_SHIFT) & LINV2_CONTROL_STATUS_RESET_INT_MASK)
#define	LINV2_CONTROL_STATUS_RESET_INT_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_RESET_INT_MASK) >> LINV2_CONTROL_STATUS_RESET_INT_SHIFT)
#define	LINV2_CONTROL_STATUS_RESET_ERROR_MASK   (0x4U)
#define	LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT   (2U)
#define	LINV2_CONTROL_STATUS_RESET_ERROR_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT) & LINV2_CONTROL_STATUS_RESET_ERROR_MASK)
#define	LINV2_CONTROL_STATUS_RESET_ERROR_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_RESET_ERROR_MASK) >> LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT)
#define	LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK   (0x2U)
#define	LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT   (1U)
#define	LINV2_CONTROL_STATUS_WAKEUP_REQ_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT) & LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK)
#define	LINV2_CONTROL_STATUS_WAKEUP_REQ_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK) >> LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT)
#define	LINV2_CONTROL_STATUS_START_REQ_MASK   (0x1U)
#define	LINV2_CONTROL_STATUS_START_REQ_SHIFT   (0U)
#define	LINV2_CONTROL_STATUS_START_REQ_SET(x)   (((uint32_t)(x) << LINV2_CONTROL_STATUS_START_REQ_SHIFT) & LINV2_CONTROL_STATUS_START_REQ_MASK)
#define	LINV2_CONTROL_STATUS_START_REQ_GET(x)   (((uint32_t)(x) & LINV2_CONTROL_STATUS_START_REQ_MASK) >> LINV2_CONTROL_STATUS_START_REQ_SHIFT)
#define	LINV2_TIMING_CONTROL_WAKE_LEN_MASK   (0x38000000UL)
#define	LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT   (27U)
#define	LINV2_TIMING_CONTROL_WAKE_LEN_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT) & LINV2_TIMING_CONTROL_WAKE_LEN_MASK)
#define	LINV2_TIMING_CONTROL_WAKE_LEN_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_WAKE_LEN_MASK) >> LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT)
#define	LINV2_TIMING_CONTROL_BRK_LEN_MASK   (0x7000000UL)
#define	LINV2_TIMING_CONTROL_BRK_LEN_SHIFT   (24U)
#define	LINV2_TIMING_CONTROL_BRK_LEN_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_BRK_LEN_SHIFT) & LINV2_TIMING_CONTROL_BRK_LEN_MASK)
#define	LINV2_TIMING_CONTROL_BRK_LEN_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_BRK_LEN_MASK) >> LINV2_TIMING_CONTROL_BRK_LEN_SHIFT)
#define	LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK   (0x400000UL)
#define	LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT   (22U)
#define	LINV2_TIMING_CONTROL_LINBUSDISABLE_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT) & LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK)
#define	LINV2_TIMING_CONTROL_LINBUSDISABLE_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK) >> LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT)
#define	LINV2_TIMING_CONTROL_LIN_INITIAL_MASK   (0x200000UL)
#define	LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT   (21U)
#define	LINV2_TIMING_CONTROL_LIN_INITIAL_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT) & LINV2_TIMING_CONTROL_LIN_INITIAL_MASK)
#define	LINV2_TIMING_CONTROL_LIN_INITIAL_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_LIN_INITIAL_MASK) >> LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT)
#define	LINV2_TIMING_CONTROL_MASTER_MODE_MASK   (0x100000UL)
#define	LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT   (20U)
#define	LINV2_TIMING_CONTROL_MASTER_MODE_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT) & LINV2_TIMING_CONTROL_MASTER_MODE_MASK)
#define	LINV2_TIMING_CONTROL_MASTER_MODE_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_MASTER_MODE_MASK) >> LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT)
#define	LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK   (0xC0000UL)
#define	LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT   (18U)
#define	LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT) & LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK)
#define	LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK) >> LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT)
#define	LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK   (0x30000UL)
#define	LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT   (16U)
#define	LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT) & LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK)
#define	LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK) >> LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT)
#define	LINV2_TIMING_CONTROL_PRESCL_MASK   (0xC000U)
#define	LINV2_TIMING_CONTROL_PRESCL_SHIFT   (14U)
#define	LINV2_TIMING_CONTROL_PRESCL_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_PRESCL_SHIFT) & LINV2_TIMING_CONTROL_PRESCL_MASK)
#define	LINV2_TIMING_CONTROL_PRESCL_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_PRESCL_MASK) >> LINV2_TIMING_CONTROL_PRESCL_SHIFT)
#define	LINV2_TIMING_CONTROL_BT_MUL_MASK   (0x3E00U)
#define	LINV2_TIMING_CONTROL_BT_MUL_SHIFT   (9U)
#define	LINV2_TIMING_CONTROL_BT_MUL_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_BT_MUL_SHIFT) & LINV2_TIMING_CONTROL_BT_MUL_MASK)
#define	LINV2_TIMING_CONTROL_BT_MUL_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_BT_MUL_MASK) >> LINV2_TIMING_CONTROL_BT_MUL_SHIFT)
#define	LINV2_TIMING_CONTROL_BT_DIV_MASK   (0x1FFU)
#define	LINV2_TIMING_CONTROL_BT_DIV_SHIFT   (0U)
#define	LINV2_TIMING_CONTROL_BT_DIV_SET(x)   (((uint32_t)(x) << LINV2_TIMING_CONTROL_BT_DIV_SHIFT) & LINV2_TIMING_CONTROL_BT_DIV_MASK)
#define	LINV2_TIMING_CONTROL_BT_DIV_GET(x)   (((uint32_t)(x) & LINV2_TIMING_CONTROL_BT_DIV_MASK) >> LINV2_TIMING_CONTROL_BT_DIV_SHIFT)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK   (0x1000U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT   (12U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SET(x)   (((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_GET(x)   (((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT)
#define	LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK   (0xF00U)
#define	LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT   (8U)
#define	LINV2_DMA_CONTROL_DMA_REQ_LEN_SET(x)   (((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK)
#define	LINV2_DMA_CONTROL_DMA_REQ_LEN_GET(x)   (((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK   (0x80U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT   (7U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SET(x)   (((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_GET(x)   (((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_MASK   (0x7EU)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT   (1U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_SET(x)   (((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ID_MASK)
#define	LINV2_DMA_CONTROL_DMA_REQ_ID_GET(x)   (((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ID_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK   (0x1U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT   (0U)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SET(x)   (((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK)
#define	LINV2_DMA_CONTROL_DMA_REQ_ENABLE_GET(x)   (((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT)
#define	LINV2_DATA_DATA0   (0UL)
#define	LINV2_DATA_DATA1   (1UL)
#define	LINV2_DATA_BYTE_DATA_BYTE0   (0UL)
#define	LINV2_DATA_BYTE_DATA_BYTE1   (1UL)
#define	LINV2_DATA_BYTE_DATA_BYTE2   (2UL)
#define	LINV2_DATA_BYTE_DATA_BYTE3   (3UL)
#define	LINV2_DATA_BYTE_DATA_BYTE4   (4UL)
#define	LINV2_DATA_BYTE_DATA_BYTE5   (5UL)
#define	LINV2_DATA_BYTE_DATA_BYTE6   (6UL)
#define	LINV2_DATA_BYTE_DATA_BYTE7   (7UL)

Macro Definition Documentation

LINV2_CONTROL_STATUS_ABORTED_GET

#define LINV2_CONTROL_STATUS_ABORTED_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_ABORTED_MASK) >> LINV2_CONTROL_STATUS_ABORTED_SHIFT)

LINV2_CONTROL_STATUS_ABORTED_MASK

#define LINV2_CONTROL_STATUS_ABORTED_MASK   (0x2000U)

LINV2_CONTROL_STATUS_ABORTED_SHIFT

#define LINV2_CONTROL_STATUS_ABORTED_SHIFT   (13U)

LINV2_CONTROL_STATUS_BIT_ERROR_GET

#define LINV2_CONTROL_STATUS_BIT_ERROR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_BIT_ERROR_MASK) >> LINV2_CONTROL_STATUS_BIT_ERROR_SHIFT)

LINV2_CONTROL_STATUS_BIT_ERROR_MASK

#define LINV2_CONTROL_STATUS_BIT_ERROR_MASK   (0x10000UL)

LINV2_CONTROL_STATUS_BIT_ERROR_SHIFT

#define LINV2_CONTROL_STATUS_BIT_ERROR_SHIFT   (16U)

LINV2_CONTROL_STATUS_BREAK_ERR_DIS_GET

#define LINV2_CONTROL_STATUS_BREAK_ERR_DIS_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK) >> LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT)

LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK

#define LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK   (0x200000UL)

LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SET

#define LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT) & LINV2_CONTROL_STATUS_BREAK_ERR_DIS_MASK)

LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT

#define LINV2_CONTROL_STATUS_BREAK_ERR_DIS_SHIFT   (21U)

LINV2_CONTROL_STATUS_BREAK_ERR_GET

#define LINV2_CONTROL_STATUS_BREAK_ERR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_BREAK_ERR_MASK) >> LINV2_CONTROL_STATUS_BREAK_ERR_SHIFT)

LINV2_CONTROL_STATUS_BREAK_ERR_MASK

#define LINV2_CONTROL_STATUS_BREAK_ERR_MASK   (0x100000UL)

LINV2_CONTROL_STATUS_BREAK_ERR_SHIFT

#define LINV2_CONTROL_STATUS_BREAK_ERR_SHIFT   (20U)

LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_GET

#define LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_MASK) >> LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_SHIFT)

LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_MASK

#define LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_MASK   (0x4000U)

LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_SHIFT

#define LINV2_CONTROL_STATUS_BUS_IDLE_TIMEOUT_SHIFT   (14U)

LINV2_CONTROL_STATUS_CHK_ERROR_GET

#define LINV2_CONTROL_STATUS_CHK_ERROR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_CHK_ERROR_MASK) >> LINV2_CONTROL_STATUS_CHK_ERROR_SHIFT)

LINV2_CONTROL_STATUS_CHK_ERROR_MASK

#define LINV2_CONTROL_STATUS_CHK_ERROR_MASK   (0x20000UL)

LINV2_CONTROL_STATUS_CHK_ERROR_SHIFT

#define LINV2_CONTROL_STATUS_CHK_ERROR_SHIFT   (17U)

LINV2_CONTROL_STATUS_COMPLETE_GET

#define LINV2_CONTROL_STATUS_COMPLETE_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_COMPLETE_MASK) >> LINV2_CONTROL_STATUS_COMPLETE_SHIFT)

LINV2_CONTROL_STATUS_COMPLETE_MASK

#define LINV2_CONTROL_STATUS_COMPLETE_MASK   (0x100U)

LINV2_CONTROL_STATUS_COMPLETE_SHIFT

#define LINV2_CONTROL_STATUS_COMPLETE_SHIFT   (8U)

LINV2_CONTROL_STATUS_DATA_ACK_GET

#define LINV2_CONTROL_STATUS_DATA_ACK_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_DATA_ACK_MASK) >> LINV2_CONTROL_STATUS_DATA_ACK_SHIFT)

LINV2_CONTROL_STATUS_DATA_ACK_MASK

#define LINV2_CONTROL_STATUS_DATA_ACK_MASK   (0x10U)

LINV2_CONTROL_STATUS_DATA_ACK_SET

#define LINV2_CONTROL_STATUS_DATA_ACK_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_DATA_ACK_SHIFT) & LINV2_CONTROL_STATUS_DATA_ACK_MASK)

LINV2_CONTROL_STATUS_DATA_ACK_SHIFT

#define LINV2_CONTROL_STATUS_DATA_ACK_SHIFT   (4U)

LINV2_CONTROL_STATUS_DATA_REQ_GET

#define LINV2_CONTROL_STATUS_DATA_REQ_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_DATA_REQ_MASK) >> LINV2_CONTROL_STATUS_DATA_REQ_SHIFT)

LINV2_CONTROL_STATUS_DATA_REQ_MASK

#define LINV2_CONTROL_STATUS_DATA_REQ_MASK   (0x1000U)

LINV2_CONTROL_STATUS_DATA_REQ_SHIFT

#define LINV2_CONTROL_STATUS_DATA_REQ_SHIFT   (12U)

LINV2_CONTROL_STATUS_ERROR_GET

#define LINV2_CONTROL_STATUS_ERROR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_ERROR_MASK) >> LINV2_CONTROL_STATUS_ERROR_SHIFT)

LINV2_CONTROL_STATUS_ERROR_MASK

#define LINV2_CONTROL_STATUS_ERROR_MASK   (0x400U)

LINV2_CONTROL_STATUS_ERROR_SHIFT

#define LINV2_CONTROL_STATUS_ERROR_SHIFT   (10U)

LINV2_CONTROL_STATUS_INT_GET

#define LINV2_CONTROL_STATUS_INT_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_INT_MASK) >> LINV2_CONTROL_STATUS_INT_SHIFT)

LINV2_CONTROL_STATUS_INT_MASK

#define LINV2_CONTROL_STATUS_INT_MASK   (0x800U)

LINV2_CONTROL_STATUS_INT_SHIFT

#define LINV2_CONTROL_STATUS_INT_SHIFT   (11U)

LINV2_CONTROL_STATUS_LIN_ACTIVE_GET

#define LINV2_CONTROL_STATUS_LIN_ACTIVE_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_LIN_ACTIVE_MASK) >> LINV2_CONTROL_STATUS_LIN_ACTIVE_SHIFT)

LINV2_CONTROL_STATUS_LIN_ACTIVE_MASK

#define LINV2_CONTROL_STATUS_LIN_ACTIVE_MASK   (0x8000U)

LINV2_CONTROL_STATUS_LIN_ACTIVE_SHIFT

#define LINV2_CONTROL_STATUS_LIN_ACTIVE_SHIFT   (15U)

LINV2_CONTROL_STATUS_PARITY_ERROR_GET

#define LINV2_CONTROL_STATUS_PARITY_ERROR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_PARITY_ERROR_MASK) >> LINV2_CONTROL_STATUS_PARITY_ERROR_SHIFT)

LINV2_CONTROL_STATUS_PARITY_ERROR_MASK

#define LINV2_CONTROL_STATUS_PARITY_ERROR_MASK   (0x80000UL)

LINV2_CONTROL_STATUS_PARITY_ERROR_SHIFT

#define LINV2_CONTROL_STATUS_PARITY_ERROR_SHIFT   (19U)

LINV2_CONTROL_STATUS_RESET_ERROR_GET

#define LINV2_CONTROL_STATUS_RESET_ERROR_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_RESET_ERROR_MASK) >> LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT)

LINV2_CONTROL_STATUS_RESET_ERROR_MASK

#define LINV2_CONTROL_STATUS_RESET_ERROR_MASK   (0x4U)

LINV2_CONTROL_STATUS_RESET_ERROR_SET

#define LINV2_CONTROL_STATUS_RESET_ERROR_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT) & LINV2_CONTROL_STATUS_RESET_ERROR_MASK)

LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT

#define LINV2_CONTROL_STATUS_RESET_ERROR_SHIFT   (2U)

LINV2_CONTROL_STATUS_RESET_INT_GET

#define LINV2_CONTROL_STATUS_RESET_INT_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_RESET_INT_MASK) >> LINV2_CONTROL_STATUS_RESET_INT_SHIFT)

LINV2_CONTROL_STATUS_RESET_INT_MASK

#define LINV2_CONTROL_STATUS_RESET_INT_MASK   (0x8U)

LINV2_CONTROL_STATUS_RESET_INT_SET

#define LINV2_CONTROL_STATUS_RESET_INT_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_RESET_INT_SHIFT) & LINV2_CONTROL_STATUS_RESET_INT_MASK)

LINV2_CONTROL_STATUS_RESET_INT_SHIFT

#define LINV2_CONTROL_STATUS_RESET_INT_SHIFT   (3U)

LINV2_CONTROL_STATUS_SLEEP_GET

#define LINV2_CONTROL_STATUS_SLEEP_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_SLEEP_MASK) >> LINV2_CONTROL_STATUS_SLEEP_SHIFT)

LINV2_CONTROL_STATUS_SLEEP_MASK

#define LINV2_CONTROL_STATUS_SLEEP_MASK   (0x40U)

LINV2_CONTROL_STATUS_SLEEP_SET

#define LINV2_CONTROL_STATUS_SLEEP_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_SLEEP_SHIFT) & LINV2_CONTROL_STATUS_SLEEP_MASK)

LINV2_CONTROL_STATUS_SLEEP_SHIFT

#define LINV2_CONTROL_STATUS_SLEEP_SHIFT   (6U)

LINV2_CONTROL_STATUS_START_REQ_GET

#define LINV2_CONTROL_STATUS_START_REQ_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_START_REQ_MASK) >> LINV2_CONTROL_STATUS_START_REQ_SHIFT)

LINV2_CONTROL_STATUS_START_REQ_MASK

#define LINV2_CONTROL_STATUS_START_REQ_MASK   (0x1U)

LINV2_CONTROL_STATUS_START_REQ_SET

#define LINV2_CONTROL_STATUS_START_REQ_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_START_REQ_SHIFT) & LINV2_CONTROL_STATUS_START_REQ_MASK)

LINV2_CONTROL_STATUS_START_REQ_SHIFT

#define LINV2_CONTROL_STATUS_START_REQ_SHIFT   (0U)

LINV2_CONTROL_STATUS_STOP_GET

#define LINV2_CONTROL_STATUS_STOP_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_STOP_MASK) >> LINV2_CONTROL_STATUS_STOP_SHIFT)

LINV2_CONTROL_STATUS_STOP_MASK

#define LINV2_CONTROL_STATUS_STOP_MASK   (0x80U)

LINV2_CONTROL_STATUS_STOP_SET

#define LINV2_CONTROL_STATUS_STOP_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_STOP_SHIFT) & LINV2_CONTROL_STATUS_STOP_MASK)

LINV2_CONTROL_STATUS_STOP_SHIFT

#define LINV2_CONTROL_STATUS_STOP_SHIFT   (7U)

LINV2_CONTROL_STATUS_TIME_OUT_GET

#define LINV2_CONTROL_STATUS_TIME_OUT_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_TIME_OUT_MASK) >> LINV2_CONTROL_STATUS_TIME_OUT_SHIFT)

LINV2_CONTROL_STATUS_TIME_OUT_MASK

#define LINV2_CONTROL_STATUS_TIME_OUT_MASK   (0x40000UL)

LINV2_CONTROL_STATUS_TIME_OUT_SHIFT

#define LINV2_CONTROL_STATUS_TIME_OUT_SHIFT   (18U)

LINV2_CONTROL_STATUS_TRANSMIT_GET

#define LINV2_CONTROL_STATUS_TRANSMIT_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_TRANSMIT_MASK) >> LINV2_CONTROL_STATUS_TRANSMIT_SHIFT)

LINV2_CONTROL_STATUS_TRANSMIT_MASK

#define LINV2_CONTROL_STATUS_TRANSMIT_MASK   (0x20U)

LINV2_CONTROL_STATUS_TRANSMIT_SET

#define LINV2_CONTROL_STATUS_TRANSMIT_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_TRANSMIT_SHIFT) & LINV2_CONTROL_STATUS_TRANSMIT_MASK)

LINV2_CONTROL_STATUS_TRANSMIT_SHIFT

#define LINV2_CONTROL_STATUS_TRANSMIT_SHIFT   (5U)

LINV2_CONTROL_STATUS_WAKEUP_GET

#define LINV2_CONTROL_STATUS_WAKEUP_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_WAKEUP_MASK) >> LINV2_CONTROL_STATUS_WAKEUP_SHIFT)

LINV2_CONTROL_STATUS_WAKEUP_MASK

#define LINV2_CONTROL_STATUS_WAKEUP_MASK   (0x200U)

LINV2_CONTROL_STATUS_WAKEUP_REQ_GET

#define LINV2_CONTROL_STATUS_WAKEUP_REQ_GET

(

x

)

(((uint32_t)(x) & LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK) >> LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT)

LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK

#define LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK   (0x2U)

LINV2_CONTROL_STATUS_WAKEUP_REQ_SET

#define LINV2_CONTROL_STATUS_WAKEUP_REQ_SET

(

x

)

(((uint32_t)(x) << LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT) & LINV2_CONTROL_STATUS_WAKEUP_REQ_MASK)

LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT

#define LINV2_CONTROL_STATUS_WAKEUP_REQ_SHIFT   (1U)

LINV2_CONTROL_STATUS_WAKEUP_SHIFT

#define LINV2_CONTROL_STATUS_WAKEUP_SHIFT   (9U)

LINV2_DATA_BYTE_DATA_BYTE0

#define LINV2_DATA_BYTE_DATA_BYTE0   (0UL)

LINV2_DATA_BYTE_DATA_BYTE1

#define LINV2_DATA_BYTE_DATA_BYTE1   (1UL)

LINV2_DATA_BYTE_DATA_BYTE2

#define LINV2_DATA_BYTE_DATA_BYTE2   (2UL)

LINV2_DATA_BYTE_DATA_BYTE3

#define LINV2_DATA_BYTE_DATA_BYTE3   (3UL)

LINV2_DATA_BYTE_DATA_BYTE4

#define LINV2_DATA_BYTE_DATA_BYTE4   (4UL)

LINV2_DATA_BYTE_DATA_BYTE5

#define LINV2_DATA_BYTE_DATA_BYTE5   (5UL)

LINV2_DATA_BYTE_DATA_BYTE6

#define LINV2_DATA_BYTE_DATA_BYTE6   (6UL)

LINV2_DATA_BYTE_DATA_BYTE7

#define LINV2_DATA_BYTE_DATA_BYTE7   (7UL)

LINV2_DATA_BYTE_DATA_BYTE_GET

#define LINV2_DATA_BYTE_DATA_BYTE_GET

(

x

)

(((uint8_t)(x) & LINV2_DATA_BYTE_DATA_BYTE_MASK) >> LINV2_DATA_BYTE_DATA_BYTE_SHIFT)

LINV2_DATA_BYTE_DATA_BYTE_MASK

#define LINV2_DATA_BYTE_DATA_BYTE_MASK   (0xFFU)

LINV2_DATA_BYTE_DATA_BYTE_SET

#define LINV2_DATA_BYTE_DATA_BYTE_SET

(

x

)

(((uint8_t)(x) << LINV2_DATA_BYTE_DATA_BYTE_SHIFT) & LINV2_DATA_BYTE_DATA_BYTE_MASK)

LINV2_DATA_BYTE_DATA_BYTE_SHIFT

#define LINV2_DATA_BYTE_DATA_BYTE_SHIFT   (0U)

LINV2_DATA_DATA0

#define LINV2_DATA_DATA0   (0UL)

LINV2_DATA_DATA1

#define LINV2_DATA_DATA1   (1UL)

LINV2_DATA_DATA_GET

#define LINV2_DATA_DATA_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_DATA_MASK) >> LINV2_DATA_DATA_SHIFT)

LINV2_DATA_DATA_MASK

#define LINV2_DATA_DATA_MASK   (0xFFFFFFFFUL)

LINV2_DATA_DATA_SET

#define LINV2_DATA_DATA_SET

(

x

)

(((uint32_t)(x) << LINV2_DATA_DATA_SHIFT) & LINV2_DATA_DATA_MASK)

LINV2_DATA_DATA_SHIFT

#define LINV2_DATA_DATA_SHIFT   (0U)

LINV2_DATA_LEN_ID_CHECKSUM_GET

#define LINV2_DATA_LEN_ID_CHECKSUM_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_LEN_ID_CHECKSUM_MASK) >> LINV2_DATA_LEN_ID_CHECKSUM_SHIFT)

LINV2_DATA_LEN_ID_CHECKSUM_MASK

#define LINV2_DATA_LEN_ID_CHECKSUM_MASK   (0xFF0000UL)

LINV2_DATA_LEN_ID_CHECKSUM_SHIFT

#define LINV2_DATA_LEN_ID_CHECKSUM_SHIFT   (16U)

LINV2_DATA_LEN_ID_DATA_LEN_GET

#define LINV2_DATA_LEN_ID_DATA_LEN_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_LEN_ID_DATA_LEN_MASK) >> LINV2_DATA_LEN_ID_DATA_LEN_SHIFT)

LINV2_DATA_LEN_ID_DATA_LEN_MASK

#define LINV2_DATA_LEN_ID_DATA_LEN_MASK   (0xFU)

LINV2_DATA_LEN_ID_DATA_LEN_SET

#define LINV2_DATA_LEN_ID_DATA_LEN_SET

(

x

)

(((uint32_t)(x) << LINV2_DATA_LEN_ID_DATA_LEN_SHIFT) & LINV2_DATA_LEN_ID_DATA_LEN_MASK)

LINV2_DATA_LEN_ID_DATA_LEN_SHIFT

#define LINV2_DATA_LEN_ID_DATA_LEN_SHIFT   (0U)

LINV2_DATA_LEN_ID_ENH_CHECK_GET

#define LINV2_DATA_LEN_ID_ENH_CHECK_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_LEN_ID_ENH_CHECK_MASK) >> LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT)

LINV2_DATA_LEN_ID_ENH_CHECK_MASK

#define LINV2_DATA_LEN_ID_ENH_CHECK_MASK   (0x80U)

LINV2_DATA_LEN_ID_ENH_CHECK_SET

#define LINV2_DATA_LEN_ID_ENH_CHECK_SET

(

x

)

(((uint32_t)(x) << LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT) & LINV2_DATA_LEN_ID_ENH_CHECK_MASK)

LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT

#define LINV2_DATA_LEN_ID_ENH_CHECK_SHIFT   (7U)

LINV2_DATA_LEN_ID_ID_GET

#define LINV2_DATA_LEN_ID_ID_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_LEN_ID_ID_MASK) >> LINV2_DATA_LEN_ID_ID_SHIFT)

LINV2_DATA_LEN_ID_ID_MASK

#define LINV2_DATA_LEN_ID_ID_MASK   (0x3F00U)

LINV2_DATA_LEN_ID_ID_PARITY_GET

#define LINV2_DATA_LEN_ID_ID_PARITY_GET

(

x

)

(((uint32_t)(x) & LINV2_DATA_LEN_ID_ID_PARITY_MASK) >> LINV2_DATA_LEN_ID_ID_PARITY_SHIFT)

LINV2_DATA_LEN_ID_ID_PARITY_MASK

#define LINV2_DATA_LEN_ID_ID_PARITY_MASK   (0xC000U)

LINV2_DATA_LEN_ID_ID_PARITY_SHIFT

#define LINV2_DATA_LEN_ID_ID_PARITY_SHIFT   (14U)

LINV2_DATA_LEN_ID_ID_SET

#define LINV2_DATA_LEN_ID_ID_SET

(

x

)

(((uint32_t)(x) << LINV2_DATA_LEN_ID_ID_SHIFT) & LINV2_DATA_LEN_ID_ID_MASK)

LINV2_DATA_LEN_ID_ID_SHIFT

#define LINV2_DATA_LEN_ID_ID_SHIFT   (8U)

LINV2_DMA_CONTROL_DMA_REQ_ENABLE_GET

#define LINV2_DMA_CONTROL_DMA_REQ_ENABLE_GET

(

x

)

(((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT)

LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK

#define LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK   (0x1U)

LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SET

#define LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SET

(

x

)

(((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ENABLE_MASK)

LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT

#define LINV2_DMA_CONTROL_DMA_REQ_ENABLE_SHIFT   (0U)

LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_GET

#define LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_GET

(

x

)

(((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT)

LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK

#define LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK   (0x1000U)

LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SET

#define LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SET

(

x

)

(((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_MASK)

LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT

#define LINV2_DMA_CONTROL_DMA_REQ_ENH_CHK_SHIFT   (12U)

LINV2_DMA_CONTROL_DMA_REQ_ID_GET

#define LINV2_DMA_CONTROL_DMA_REQ_ID_GET

(

x

)

(((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ID_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT)

LINV2_DMA_CONTROL_DMA_REQ_ID_MASK

#define LINV2_DMA_CONTROL_DMA_REQ_ID_MASK   (0x7EU)

LINV2_DMA_CONTROL_DMA_REQ_ID_SET

#define LINV2_DMA_CONTROL_DMA_REQ_ID_SET

(

x

)

(((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ID_MASK)

LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT

#define LINV2_DMA_CONTROL_DMA_REQ_ID_SHIFT   (1U)

LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_GET

#define LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_GET

(

x

)

(((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT)

LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK

#define LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK   (0x80U)

LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SET

#define LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SET

(

x

)

(((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_MASK)

LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT

#define LINV2_DMA_CONTROL_DMA_REQ_ID_TYPE_SHIFT   (7U)

LINV2_DMA_CONTROL_DMA_REQ_LEN_GET

#define LINV2_DMA_CONTROL_DMA_REQ_LEN_GET

(

x

)

(((uint32_t)(x) & LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK) >> LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT)

LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK

#define LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK   (0xF00U)

LINV2_DMA_CONTROL_DMA_REQ_LEN_SET

#define LINV2_DMA_CONTROL_DMA_REQ_LEN_SET

(

x

)

(((uint32_t)(x) << LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT) & LINV2_DMA_CONTROL_DMA_REQ_LEN_MASK)

LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT

#define LINV2_DMA_CONTROL_DMA_REQ_LEN_SHIFT   (8U)

LINV2_TIMING_CONTROL_BRK_LEN_GET

#define LINV2_TIMING_CONTROL_BRK_LEN_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_BRK_LEN_MASK) >> LINV2_TIMING_CONTROL_BRK_LEN_SHIFT)

LINV2_TIMING_CONTROL_BRK_LEN_MASK

#define LINV2_TIMING_CONTROL_BRK_LEN_MASK   (0x7000000UL)

LINV2_TIMING_CONTROL_BRK_LEN_SET

#define LINV2_TIMING_CONTROL_BRK_LEN_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_BRK_LEN_SHIFT) & LINV2_TIMING_CONTROL_BRK_LEN_MASK)

LINV2_TIMING_CONTROL_BRK_LEN_SHIFT

#define LINV2_TIMING_CONTROL_BRK_LEN_SHIFT   (24U)

LINV2_TIMING_CONTROL_BT_DIV_GET

#define LINV2_TIMING_CONTROL_BT_DIV_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_BT_DIV_MASK) >> LINV2_TIMING_CONTROL_BT_DIV_SHIFT)

LINV2_TIMING_CONTROL_BT_DIV_MASK

#define LINV2_TIMING_CONTROL_BT_DIV_MASK   (0x1FFU)

LINV2_TIMING_CONTROL_BT_DIV_SET

#define LINV2_TIMING_CONTROL_BT_DIV_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_BT_DIV_SHIFT) & LINV2_TIMING_CONTROL_BT_DIV_MASK)

LINV2_TIMING_CONTROL_BT_DIV_SHIFT

#define LINV2_TIMING_CONTROL_BT_DIV_SHIFT   (0U)

LINV2_TIMING_CONTROL_BT_MUL_GET

#define LINV2_TIMING_CONTROL_BT_MUL_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_BT_MUL_MASK) >> LINV2_TIMING_CONTROL_BT_MUL_SHIFT)

LINV2_TIMING_CONTROL_BT_MUL_MASK

#define LINV2_TIMING_CONTROL_BT_MUL_MASK   (0x3E00U)

LINV2_TIMING_CONTROL_BT_MUL_SET

#define LINV2_TIMING_CONTROL_BT_MUL_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_BT_MUL_SHIFT) & LINV2_TIMING_CONTROL_BT_MUL_MASK)

LINV2_TIMING_CONTROL_BT_MUL_SHIFT

#define LINV2_TIMING_CONTROL_BT_MUL_SHIFT   (9U)

LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_GET

#define LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK) >> LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT)

LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK

#define LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK   (0xC0000UL)

LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SET

#define LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT) & LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_MASK)

LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT

#define LINV2_TIMING_CONTROL_BUS_INACTIVE_TIME_SHIFT   (18U)

LINV2_TIMING_CONTROL_LIN_INITIAL_GET

#define LINV2_TIMING_CONTROL_LIN_INITIAL_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_LIN_INITIAL_MASK) >> LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT)

LINV2_TIMING_CONTROL_LIN_INITIAL_MASK

#define LINV2_TIMING_CONTROL_LIN_INITIAL_MASK   (0x200000UL)

LINV2_TIMING_CONTROL_LIN_INITIAL_SET

#define LINV2_TIMING_CONTROL_LIN_INITIAL_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT) & LINV2_TIMING_CONTROL_LIN_INITIAL_MASK)

LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT

#define LINV2_TIMING_CONTROL_LIN_INITIAL_SHIFT   (21U)

LINV2_TIMING_CONTROL_LINBUSDISABLE_GET

#define LINV2_TIMING_CONTROL_LINBUSDISABLE_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK) >> LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT)

LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK

#define LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK   (0x400000UL)

LINV2_TIMING_CONTROL_LINBUSDISABLE_SET

#define LINV2_TIMING_CONTROL_LINBUSDISABLE_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT) & LINV2_TIMING_CONTROL_LINBUSDISABLE_MASK)

LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT

#define LINV2_TIMING_CONTROL_LINBUSDISABLE_SHIFT   (22U)

LINV2_TIMING_CONTROL_MASTER_MODE_GET

#define LINV2_TIMING_CONTROL_MASTER_MODE_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_MASTER_MODE_MASK) >> LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT)

LINV2_TIMING_CONTROL_MASTER_MODE_MASK

#define LINV2_TIMING_CONTROL_MASTER_MODE_MASK   (0x100000UL)

LINV2_TIMING_CONTROL_MASTER_MODE_SET

#define LINV2_TIMING_CONTROL_MASTER_MODE_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT) & LINV2_TIMING_CONTROL_MASTER_MODE_MASK)

LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT

#define LINV2_TIMING_CONTROL_MASTER_MODE_SHIFT   (20U)

LINV2_TIMING_CONTROL_PRESCL_GET

#define LINV2_TIMING_CONTROL_PRESCL_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_PRESCL_MASK) >> LINV2_TIMING_CONTROL_PRESCL_SHIFT)

LINV2_TIMING_CONTROL_PRESCL_MASK

#define LINV2_TIMING_CONTROL_PRESCL_MASK   (0xC000U)

LINV2_TIMING_CONTROL_PRESCL_SET

#define LINV2_TIMING_CONTROL_PRESCL_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_PRESCL_SHIFT) & LINV2_TIMING_CONTROL_PRESCL_MASK)

LINV2_TIMING_CONTROL_PRESCL_SHIFT

#define LINV2_TIMING_CONTROL_PRESCL_SHIFT   (14U)

LINV2_TIMING_CONTROL_WAKE_LEN_GET

#define LINV2_TIMING_CONTROL_WAKE_LEN_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_WAKE_LEN_MASK) >> LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT)

LINV2_TIMING_CONTROL_WAKE_LEN_MASK

#define LINV2_TIMING_CONTROL_WAKE_LEN_MASK   (0x38000000UL)

LINV2_TIMING_CONTROL_WAKE_LEN_SET

#define LINV2_TIMING_CONTROL_WAKE_LEN_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT) & LINV2_TIMING_CONTROL_WAKE_LEN_MASK)

LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT

#define LINV2_TIMING_CONTROL_WAKE_LEN_SHIFT   (27U)

LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_GET

#define LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_GET

(

x

)

(((uint32_t)(x) & LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK) >> LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT)

LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK

#define LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK   (0x30000UL)

LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SET

#define LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SET

(

x

)

(((uint32_t)(x) << LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT) & LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_MASK)

LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT

#define LINV2_TIMING_CONTROL_WUP_REPEAT_TIME_SHIFT   (16U)