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HPM SDK
HPMicro Software Development Kit
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HPM SDK
HPMicro Software Development Kit
|
Go to the source code of this file.
| #define WM8960_3D 0x10U /* 3D Control */ |
| #define WM8960_3D_3DDEPTH_GET | ( | x | ) | (((uint16_t)(x) & WM8960_3D_3DDEPTH_MASK) >> WM8960_3D_3DDEPTH_SHIFT) |
| #define WM8960_3D_3DDEPTH_MASK (0x1EU) |
| #define WM8960_3D_3DDEPTH_SET | ( | x | ) | (((uint16_t)(x) << WM8960_3D_3DDEPTH_SHIFT) & WM8960_3D_3DDEPTH_MASK) |
| #define WM8960_3D_3DDEPTH_SHIFT (1U) |
| #define WM8960_3D_3DEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_3D_3DEN_MASK) >> WM8960_3D_3DEN_SHIFT) |
| #define WM8960_3D_3DEN_MASK (0x1U) |
| #define WM8960_3D_3DEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_3D_3DEN_SHIFT) & WM8960_3D_3DEN_MASK) |
| #define WM8960_3D_3DEN_SHIFT (0U) |
| #define WM8960_3D_3DLC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_3D_3DLC_MASK) >> WM8960_3D_3DLC_SHIFT) |
| #define WM8960_3D_3DLC_MASK (0x20U) |
| #define WM8960_3D_3DLC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_3D_3DLC_SHIFT) & WM8960_3D_3DLC_MASK) |
| #define WM8960_3D_3DLC_SHIFT (5U) |
| #define WM8960_3D_3DUC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_3D_3DUC_MASK) >> WM8960_3D_3DUC_SHIFT) |
| #define WM8960_3D_3DUC_MASK (0x40U) |
| #define WM8960_3D_3DUC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_3D_3DUC_SHIFT) & WM8960_3D_3DUC_MASK) |
| #define WM8960_3D_3DUC_SHIFT (6U) |
| #define WM8960_ADDCTL1 0x17U /* Additional Control (1) */ |
| #define WM8960_ADDCTL1_DATSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_DATSEL_MASK) >> WM8960_ADDCTL1_DATSEL_SHIFT) |
| #define WM8960_ADDCTL1_DATSEL_MASK (0xCU) |
| #define WM8960_ADDCTL1_DATSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_DATSEL_SHIFT) & WM8960_ADDCTL1_DATSEL_MASK) |
| #define WM8960_ADDCTL1_DATSEL_SHIFT (2U) |
| #define WM8960_ADDCTL1_DMONOMIX_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_DMONOMIX_MASK) >> WM8960_ADDCTL1_DMONOMIX_SHIFT) |
| #define WM8960_ADDCTL1_DMONOMIX_MASK (0x10U) |
| #define WM8960_ADDCTL1_DMONOMIX_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_DMONOMIX_SHIFT) & WM8960_ADDCTL1_DMONOMIX_MASK) |
| #define WM8960_ADDCTL1_DMONOMIX_SHIFT (4U) |
| #define WM8960_ADDCTL1_TOCLKSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_TOCLKSEL_MASK) >> WM8960_ADDCTL1_TOCLKSEL_SHIFT) |
| #define WM8960_ADDCTL1_TOCLKSEL_MASK (0x2U) |
| #define WM8960_ADDCTL1_TOCLKSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_TOCLKSEL_SHIFT) & WM8960_ADDCTL1_TOCLKSEL_MASK) |
| #define WM8960_ADDCTL1_TOCLKSEL_SHIFT (1U) |
| #define WM8960_ADDCTL1_TOEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_TOEN_MASK) >> WM8960_ADDCTL1_TOEN_SHIFT) |
| #define WM8960_ADDCTL1_TOEN_MASK (0x1U) |
| #define WM8960_ADDCTL1_TOEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_TOEN_SHIFT) & WM8960_ADDCTL1_TOEN_MASK) |
| #define WM8960_ADDCTL1_TOEN_SHIFT (0U) |
| #define WM8960_ADDCTL1_TSDEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_TSDEN_MASK) >> WM8960_ADDCTL1_TSDEN_SHIFT) |
| #define WM8960_ADDCTL1_TSDEN_MASK (0x100U) |
| #define WM8960_ADDCTL1_TSDEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_TSDEN_SHIFT) & WM8960_ADDCTL1_TSDEN_MASK) |
| #define WM8960_ADDCTL1_TSDEN_SHIFT (8U) |
| #define WM8960_ADDCTL1_VSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL1_VSEL_MASK) >> WM8960_ADDCTL1_VSEL_SHIFT) |
| #define WM8960_ADDCTL1_VSEL_MASK (0xC0U) |
| #define WM8960_ADDCTL1_VSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL1_VSEL_SHIFT) & WM8960_ADDCTL1_VSEL_MASK) |
| #define WM8960_ADDCTL1_VSEL_SHIFT (6U) |
| #define WM8960_ADDCTL2 0x18U /* Additional Control (2) */ |
| #define WM8960_ADDCTL2_HPSWEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL2_HPSWEN_MASK) >> WM8960_ADDCTL2_HPSWEN_SHIFT) |
| #define WM8960_ADDCTL2_HPSWEN_MASK (0x40U) |
| #define WM8960_ADDCTL2_HPSWEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL2_HPSWEN_SHIFT) & WM8960_ADDCTL2_HPSWEN_MASK) |
| #define WM8960_ADDCTL2_HPSWEN_SHIFT (6U) |
| #define WM8960_ADDCTL2_HPSWPOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL2_HPSWPOL_MASK) >> WM8960_ADDCTL2_HPSWPOL_SHIFT) |
| #define WM8960_ADDCTL2_HPSWPOL_MASK (0x20U) |
| #define WM8960_ADDCTL2_HPSWPOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL2_HPSWPOL_SHIFT) & WM8960_ADDCTL2_HPSWPOL_MASK) |
| #define WM8960_ADDCTL2_HPSWPOL_SHIFT (5U) |
| #define WM8960_ADDCTL2_LRCM_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL2_LRCM_MASK) >> WM8960_ADDCTL2_LRCM_SHIFT) |
| #define WM8960_ADDCTL2_LRCM_MASK (0x4U) |
| #define WM8960_ADDCTL2_LRCM_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL2_LRCM_SHIFT) & WM8960_ADDCTL2_LRCM_MASK) |
| #define WM8960_ADDCTL2_LRCM_SHIFT (2U) |
| #define WM8960_ADDCTL2_TRIS_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL2_TRIS_MASK) >> WM8960_ADDCTL2_TRIS_SHIFT) |
| #define WM8960_ADDCTL2_TRIS_MASK (0x8U) |
| #define WM8960_ADDCTL2_TRIS_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL2_TRIS_SHIFT) & WM8960_ADDCTL2_TRIS_MASK) |
| #define WM8960_ADDCTL2_TRIS_SHIFT (3U) |
| #define WM8960_ADDCTL3 0x1bU /* Additional Control (3) */ |
| #define WM8960_ADDCTL3_ADC_ALC_SR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL3_ADC_ALC_SR_MASK) >> WM8960_ADDCTL3_ADC_ALC_SR_SHIFT) |
| #define WM8960_ADDCTL3_ADC_ALC_SR_MASK (0x7U) |
| #define WM8960_ADDCTL3_ADC_ALC_SR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL3_ADC_ALC_SR_SHIFT) & WM8960_ADDCTL3_ADC_ALC_SR_MASK) |
| #define WM8960_ADDCTL3_ADC_ALC_SR_SHIFT (0U) |
| #define WM8960_ADDCTL3_OUT3CAP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL3_OUT3CAP_MASK) >> WM8960_ADDCTL3_OUT3CAP_SHIFT) |
| #define WM8960_ADDCTL3_OUT3CAP_MASK (0x8U) |
| #define WM8960_ADDCTL3_OUT3CAP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL3_OUT3CAP_SHIFT) & WM8960_ADDCTL3_OUT3CAP_MASK) |
| #define WM8960_ADDCTL3_OUT3CAP_SHIFT (3U) |
| #define WM8960_ADDCTL3_VROI_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL3_VROI_MASK) >> WM8960_ADDCTL3_VROI_SHIFT) |
| #define WM8960_ADDCTL3_VROI_MASK (0x40U) |
| #define WM8960_ADDCTL3_VROI_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL3_VROI_SHIFT) & WM8960_ADDCTL3_VROI_MASK) |
| #define WM8960_ADDCTL3_VROI_SHIFT (6U) |
| #define WM8960_ADDCTL4 0x30U /* Additional Control (4) */ |
| #define WM8960_ADDCTL4_GPIOPOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL4_GPIOPOL_MASK) >> WM8960_ADDCTL4_GPIOPOL_SHIFT) |
| #define WM8960_ADDCTL4_GPIOPOL_MASK (0x80U) |
| #define WM8960_ADDCTL4_GPIOPOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL4_GPIOPOL_SHIFT) & WM8960_ADDCTL4_GPIOPOL_MASK) |
| #define WM8960_ADDCTL4_GPIOPOL_SHIFT (7U) |
| #define WM8960_ADDCTL4_GPIOSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL4_GPIOSEL_MASK) >> WM8960_ADDCTL4_GPIOSEL_SHIFT) |
| #define WM8960_ADDCTL4_GPIOSEL_MASK (0x70U) |
| #define WM8960_ADDCTL4_GPIOSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL4_GPIOSEL_SHIFT) & WM8960_ADDCTL4_GPIOSEL_MASK) |
| #define WM8960_ADDCTL4_GPIOSEL_SHIFT (4U) |
| #define WM8960_ADDCTL4_HPSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL4_HPSEL_MASK) >> WM8960_ADDCTL4_HPSEL_SHIFT) |
| #define WM8960_ADDCTL4_HPSEL_MASK (0xCU) |
| #define WM8960_ADDCTL4_HPSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL4_HPSEL_SHIFT) & WM8960_ADDCTL4_HPSEL_MASK) |
| #define WM8960_ADDCTL4_HPSEL_SHIFT (2U) |
| #define WM8960_ADDCTL4_MBSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL4_MBSEL_MASK) >> WM8960_ADDCTL4_MBSEL_SHIFT) |
| #define WM8960_ADDCTL4_MBSEL_MASK (0x1U) |
| #define WM8960_ADDCTL4_MBSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL4_MBSEL_SHIFT) & WM8960_ADDCTL4_MBSEL_MASK) |
| #define WM8960_ADDCTL4_MBSEL_SHIFT (0U) |
| #define WM8960_ADDCTL4_TSENSEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ADDCTL4_TSENSEN_MASK) >> WM8960_ADDCTL4_TSENSEN_SHIFT) |
| #define WM8960_ADDCTL4_TSENSEN_MASK (0x2U) |
| #define WM8960_ADDCTL4_TSENSEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ADDCTL4_TSENSEN_SHIFT) & WM8960_ADDCTL4_TSENSEN_MASK) |
| #define WM8960_ADDCTL4_TSENSEN_SHIFT (1U) |
| #define WM8960_ALC1 0x11U /* ALC (1) */ |
| #define WM8960_ALC1_ALCL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC1_ALCL_MASK) >> WM8960_ALC1_ALCL_SHIFT) |
| #define WM8960_ALC1_ALCL_MASK (0xFU) |
| #define WM8960_ALC1_ALCL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC1_ALCL_SHIFT) & WM8960_ALC1_ALCL_MASK) |
| #define WM8960_ALC1_ALCL_SHIFT (0U) |
| #define WM8960_ALC1_ALCSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC1_ALCSEL_MASK) >> WM8960_ALC1_ALCSEL_SHIFT) |
| #define WM8960_ALC1_ALCSEL_MASK (0x180U) |
| #define WM8960_ALC1_ALCSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC1_ALCSEL_SHIFT) & WM8960_ALC1_ALCSEL_MASK) |
| #define WM8960_ALC1_ALCSEL_SHIFT (7U) |
| #define WM8960_ALC1_MAXGAIN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC1_MAXGAIN_MASK) >> WM8960_ALC1_MAXGAIN_SHIFT) |
| #define WM8960_ALC1_MAXGAIN_MASK (0x70U) |
| #define WM8960_ALC1_MAXGAIN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC1_MAXGAIN_SHIFT) & WM8960_ALC1_MAXGAIN_MASK) |
| #define WM8960_ALC1_MAXGAIN_SHIFT (4U) |
| #define WM8960_ALC2 0x12U /* ALC (2) */ |
| #define WM8960_ALC2_HLD_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC2_HLD_MASK) >> WM8960_ALC2_HLD_SHIFT) |
| #define WM8960_ALC2_HLD_MASK (0xFU) |
| #define WM8960_ALC2_HLD_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC2_HLD_SHIFT) & WM8960_ALC2_HLD_MASK) |
| #define WM8960_ALC2_HLD_SHIFT (0U) |
| #define WM8960_ALC2_MINGAIN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC2_MINGAIN_MASK) >> WM8960_ALC2_MINGAIN_SHIFT) |
| #define WM8960_ALC2_MINGAIN_MASK (0x70U) |
| #define WM8960_ALC2_MINGAIN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC2_MINGAIN_SHIFT) & WM8960_ALC2_MINGAIN_MASK) |
| #define WM8960_ALC2_MINGAIN_SHIFT (4U) |
| #define WM8960_ALC3 0x13U /* ALC (3) */ |
| #define WM8960_ALC3_ALCMODE_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC3_ALCMODE_MASK) >> WM8960_ALC3_ALCMODE_SHIFT) |
| #define WM8960_ALC3_ALCMODE_MASK (0x100U) |
| #define WM8960_ALC3_ALCMODE_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC3_ALCMODE_SHIFT) & WM8960_ALC3_ALCMODE_MASK) |
| #define WM8960_ALC3_ALCMODE_SHIFT (8U) |
| #define WM8960_ALC3_ATK_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC3_ATK_MASK) >> WM8960_ALC3_ATK_SHIFT) |
| #define WM8960_ALC3_ATK_MASK (0xFU) |
| #define WM8960_ALC3_ATK_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC3_ATK_SHIFT) & WM8960_ALC3_ATK_MASK) |
| #define WM8960_ALC3_ATK_SHIFT (0U) |
| #define WM8960_ALC3_DCY_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ALC3_DCY_MASK) >> WM8960_ALC3_DCY_SHIFT) |
| #define WM8960_ALC3_DCY_MASK (0xF0U) |
| #define WM8960_ALC3_DCY_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ALC3_DCY_SHIFT) & WM8960_ALC3_DCY_MASK) |
| #define WM8960_ALC3_DCY_SHIFT (4U) |
| #define WM8960_APOP1 0x1cU /* Anti-Pop 1 */ |
| #define WM8960_APOP1_BUFDCOPEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP1_BUFDCOPEN_MASK) >> WM8960_APOP1_BUFDCOPEN_SHIFT) |
| #define WM8960_APOP1_BUFDCOPEN_MASK (0x10U) |
| #define WM8960_APOP1_BUFDCOPEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP1_BUFDCOPEN_SHIFT) & WM8960_APOP1_BUFDCOPEN_MASK) |
| #define WM8960_APOP1_BUFDCOPEN_SHIFT (4U) |
| #define WM8960_APOP1_BUFIOEN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP1_BUFIOEN_MASK) >> WM8960_APOP1_BUFIOEN_SHIFT) |
| #define WM8960_APOP1_BUFIOEN_MASK (0x8U) |
| #define WM8960_APOP1_BUFIOEN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP1_BUFIOEN_SHIFT) & WM8960_APOP1_BUFIOEN_MASK) |
| #define WM8960_APOP1_BUFIOEN_SHIFT (3U) |
| #define WM8960_APOP1_HPSTBY_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP1_HPSTBY_MASK) >> WM8960_APOP1_HPSTBY_SHIFT) |
| #define WM8960_APOP1_HPSTBY_MASK (0x1U) |
| #define WM8960_APOP1_HPSTBY_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP1_HPSTBY_SHIFT) & WM8960_APOP1_HPSTBY_MASK) |
| #define WM8960_APOP1_HPSTBY_SHIFT (0U) |
| #define WM8960_APOP1_POBCTRL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP1_POBCTRL_MASK) >> WM8960_APOP1_POBCTRL_SHIFT) |
| #define WM8960_APOP1_POBCTRL_MASK (0x80U) |
| #define WM8960_APOP1_POBCTRL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP1_POBCTRL_SHIFT) & WM8960_APOP1_POBCTRL_MASK) |
| #define WM8960_APOP1_POBCTRL_SHIFT (7U) |
| #define WM8960_APOP1_SOFT_ST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP1_SOFT_ST_MASK) >> WM8960_APOP1_SOFT_ST_SHIFT) |
| #define WM8960_APOP1_SOFT_ST_MASK (0x4U) |
| #define WM8960_APOP1_SOFT_ST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP1_SOFT_ST_SHIFT) & WM8960_APOP1_SOFT_ST_MASK) |
| #define WM8960_APOP1_SOFT_ST_SHIFT (2U) |
| #define WM8960_APOP2 0x1dU /* Anti-pop 2 */ |
| #define WM8960_APOP2_DISOP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP2_DISOP_MASK) >> WM8960_APOP2_DISOP_SHIFT) |
| #define WM8960_APOP2_DISOP_MASK (0x40U) |
| #define WM8960_APOP2_DISOP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP2_DISOP_SHIFT) & WM8960_APOP2_DISOP_MASK) |
| #define WM8960_APOP2_DISOP_SHIFT (6U) |
| #define WM8960_APOP2_DRES_GET | ( | x | ) | (((uint16_t)(x) & WM8960_APOP2_DRES_MASK) >> WM8960_APOP2_DRES_SHIFT) |
| #define WM8960_APOP2_DRES_MASK (0x30U) |
| #define WM8960_APOP2_DRES_SET | ( | x | ) | (((uint16_t)(x) << WM8960_APOP2_DRES_SHIFT) & WM8960_APOP2_DRES_MASK) |
| #define WM8960_APOP2_DRES_SHIFT (4U) |
| #define WM8960_BYPASS1 0x2dU /* Left Bypass */ |
| #define WM8960_BYPASS1_LB2LO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_BYPASS1_LB2LO_MASK) >> WM8960_BYPASS1_LB2LO_SHIFT) |
| #define WM8960_BYPASS1_LB2LO_MASK (0x80U) |
| #define WM8960_BYPASS1_LB2LO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_BYPASS1_LB2LO_SHIFT) & WM8960_BYPASS1_LB2LO_MASK) |
| #define WM8960_BYPASS1_LB2LO_SHIFT (7U) |
| #define WM8960_BYPASS1_LB2LOVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_BYPASS1_LB2LOVOL_MASK) >> WM8960_BYPASS1_LB2LOVOL_SHIFT) |
| #define WM8960_BYPASS1_LB2LOVOL_MASK (0x70U) |
| #define WM8960_BYPASS1_LB2LOVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_BYPASS1_LB2LOVOL_SHIFT) & WM8960_BYPASS1_LB2LOVOL_MASK) |
| #define WM8960_BYPASS1_LB2LOVOL_SHIFT (4U) |
| #define WM8960_BYPASS2 0x2eU /* Right Bypass */ |
| #define WM8960_BYPASS2_RB2RO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_BYPASS2_RB2RO_MASK) >> WM8960_BYPASS2_RB2RO_SHIFT) |
| #define WM8960_BYPASS2_RB2RO_MASK (0x80U) |
| #define WM8960_BYPASS2_RB2RO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_BYPASS2_RB2RO_SHIFT) & WM8960_BYPASS2_RB2RO_MASK) |
| #define WM8960_BYPASS2_RB2RO_SHIFT (7U) |
| #define WM8960_BYPASS2_RB2ROVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_BYPASS2_RB2ROVOL_MASK) >> WM8960_BYPASS2_RB2ROVOL_SHIFT) |
| #define WM8960_BYPASS2_RB2ROVOL_MASK (0x70U) |
| #define WM8960_BYPASS2_RB2ROVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_BYPASS2_RB2ROVOL_SHIFT) & WM8960_BYPASS2_RB2ROVOL_MASK) |
| #define WM8960_BYPASS2_RB2ROVOL_SHIFT (4U) |
| #define WM8960_CLASSD1 0x31U /* Class D Control (1) */ |
| #define WM8960_CLASSD1_SPK_OP_EN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLASSD1_SPK_OP_EN_MASK) >> WM8960_CLASSD1_SPK_OP_EN_SHIFT) |
| #define WM8960_CLASSD1_SPK_OP_EN_MASK (0xC0U) |
| #define WM8960_CLASSD1_SPK_OP_EN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLASSD1_SPK_OP_EN_SHIFT) & WM8960_CLASSD1_SPK_OP_EN_MASK) |
| #define WM8960_CLASSD1_SPK_OP_EN_SHIFT (6U) |
| #define WM8960_CLASSD3 0x33U /* Class D Control (2) */ |
| #define WM8960_CLASSD3_ACGAIN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLASSD3_ACGAIN_MASK) >> WM8960_CLASSD3_ACGAIN_SHIFT) |
| #define WM8960_CLASSD3_ACGAIN_MASK (0x7U) |
| #define WM8960_CLASSD3_ACGAIN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLASSD3_ACGAIN_SHIFT) & WM8960_CLASSD3_ACGAIN_MASK) |
| #define WM8960_CLASSD3_ACGAIN_SHIFT (0U) |
| #define WM8960_CLASSD3_DCGAIN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLASSD3_DCGAIN_MASK) >> WM8960_CLASSD3_DCGAIN_SHIFT) |
| #define WM8960_CLASSD3_DCGAIN_MASK (0x38U) |
| #define WM8960_CLASSD3_DCGAIN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLASSD3_DCGAIN_SHIFT) & WM8960_CLASSD3_DCGAIN_MASK) |
| #define WM8960_CLASSD3_DCGAIN_SHIFT (3U) |
| #define WM8960_CLOCK1 0x4U /* Clocking(1) */ |
| #define WM8960_CLOCK1_ADCDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK1_ADCDIV_MASK) >> WM8960_CLOCK1_ADCDIV_SHIFT) |
| #define WM8960_CLOCK1_ADCDIV_MASK (0x1C0U) |
| #define WM8960_CLOCK1_ADCDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK1_ADCDIV_SHIFT) & WM8960_CLOCK1_ADCDIV_MASK) |
| #define WM8960_CLOCK1_ADCDIV_SHIFT (6U) |
| #define WM8960_CLOCK1_CLKSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK1_CLKSEL_MASK) >> WM8960_CLOCK1_CLKSEL_SHIFT) |
| #define WM8960_CLOCK1_CLKSEL_MASK (0x1U) |
| #define WM8960_CLOCK1_CLKSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK1_CLKSEL_SHIFT) & WM8960_CLOCK1_CLKSEL_MASK) |
| #define WM8960_CLOCK1_CLKSEL_SHIFT (0U) |
| #define WM8960_CLOCK1_DACDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK1_DACDIV_MASK) >> WM8960_CLOCK1_DACDIV_SHIFT) |
| #define WM8960_CLOCK1_DACDIV_MASK (0x38U) |
| #define WM8960_CLOCK1_DACDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK1_DACDIV_SHIFT) & WM8960_CLOCK1_DACDIV_MASK) |
| #define WM8960_CLOCK1_DACDIV_SHIFT (3U) |
| #define WM8960_CLOCK1_SYSCLKDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK1_SYSCLKDIV_MASK) >> WM8960_CLOCK1_SYSCLKDIV_SHIFT) |
| #define WM8960_CLOCK1_SYSCLKDIV_MASK (0x6U) |
| #define WM8960_CLOCK1_SYSCLKDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK1_SYSCLKDIV_SHIFT) & WM8960_CLOCK1_SYSCLKDIV_MASK) |
| #define WM8960_CLOCK1_SYSCLKDIV_SHIFT (1U) |
| #define WM8960_CLOCK2 0x8U /* Clocking(2) */ |
| #define WM8960_CLOCK2_BCLKDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK2_BCLKDIV_MASK) >> WM8960_CLOCK2_BCLKDIV_SHIFT) |
| #define WM8960_CLOCK2_BCLKDIV_MASK (0xFU) |
| #define WM8960_CLOCK2_BCLKDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK2_BCLKDIV_SHIFT) & WM8960_CLOCK2_BCLKDIV_MASK) |
| #define WM8960_CLOCK2_BCLKDIV_SHIFT (0U) |
| #define WM8960_CLOCK2_DCLKDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_CLOCK2_DCLKDIV_MASK) >> WM8960_CLOCK2_DCLKDIV_SHIFT) |
| #define WM8960_CLOCK2_DCLKDIV_MASK (0x1C0U) |
| #define WM8960_CLOCK2_DCLKDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_CLOCK2_DCLKDIV_SHIFT) & WM8960_CLOCK2_DCLKDIV_MASK) |
| #define WM8960_CLOCK2_DCLKDIV_SHIFT (6U) |
| #define WM8960_DACCTL1 0x5U /* ADC and DAC Control (1) */ |
| #define WM8960_DACCTL1_ADCHPD_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL1_ADCHPD_MASK) >> WM8960_DACCTL1_ADCHPD_SHIFT) |
| #define WM8960_DACCTL1_ADCHPD_MASK (0x1U) |
| #define WM8960_DACCTL1_ADCHPD_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL1_ADCHPD_SHIFT) & WM8960_DACCTL1_ADCHPD_MASK) |
| #define WM8960_DACCTL1_ADCHPD_SHIFT (0U) |
| #define WM8960_DACCTL1_ADCPOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL1_ADCPOL_MASK) >> WM8960_DACCTL1_ADCPOL_SHIFT) |
| #define WM8960_DACCTL1_ADCPOL_MASK (0x60U) |
| #define WM8960_DACCTL1_ADCPOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL1_ADCPOL_SHIFT) & WM8960_DACCTL1_ADCPOL_MASK) |
| #define WM8960_DACCTL1_ADCPOL_SHIFT (5U) |
| #define WM8960_DACCTL1_DACDIV2_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL1_DACDIV2_MASK) >> WM8960_DACCTL1_DACDIV2_SHIFT) |
| #define WM8960_DACCTL1_DACDIV2_MASK (0x80U) |
| #define WM8960_DACCTL1_DACDIV2_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL1_DACDIV2_SHIFT) & WM8960_DACCTL1_DACDIV2_MASK) |
| #define WM8960_DACCTL1_DACDIV2_SHIFT (7U) |
| #define WM8960_DACCTL1_DACMU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL1_DACMU_MASK) >> WM8960_DACCTL1_DACMU_SHIFT) |
| #define WM8960_DACCTL1_DACMU_MASK (0x8U) |
| #define WM8960_DACCTL1_DACMU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL1_DACMU_SHIFT) & WM8960_DACCTL1_DACMU_MASK) |
| #define WM8960_DACCTL1_DACMU_SHIFT (3U) |
| #define WM8960_DACCTL1_DEEMPH_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL1_DEEMPH_MASK) >> WM8960_DACCTL1_DEEMPH_SHIFT) |
| #define WM8960_DACCTL1_DEEMPH_MASK (0x6U) |
| #define WM8960_DACCTL1_DEEMPH_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL1_DEEMPH_SHIFT) & WM8960_DACCTL1_DEEMPH_MASK) |
| #define WM8960_DACCTL1_DEEMPH_SHIFT (1U) |
| #define WM8960_DACCTL2 0x6U /* ADC and DAC Control (2) */ |
| #define WM8960_DACCTL2_DACMR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL2_DACMR_MASK) >> WM8960_DACCTL2_DACMR_SHIFT) |
| #define WM8960_DACCTL2_DACMR_MASK (0x4U) |
| #define WM8960_DACCTL2_DACMR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL2_DACMR_SHIFT) & WM8960_DACCTL2_DACMR_MASK) |
| #define WM8960_DACCTL2_DACMR_SHIFT (2U) |
| #define WM8960_DACCTL2_DACPOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL2_DACPOL_MASK) >> WM8960_DACCTL2_DACPOL_SHIFT) |
| #define WM8960_DACCTL2_DACPOL_MASK (0x60U) |
| #define WM8960_DACCTL2_DACPOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL2_DACPOL_SHIFT) & WM8960_DACCTL2_DACPOL_MASK) |
| #define WM8960_DACCTL2_DACPOL_SHIFT (5U) |
| #define WM8960_DACCTL2_DACSLOPE_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL2_DACSLOPE_MASK) >> WM8960_DACCTL2_DACSLOPE_SHIFT) |
| #define WM8960_DACCTL2_DACSLOPE_MASK (0x2U) |
| #define WM8960_DACCTL2_DACSLOPE_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL2_DACSLOPE_SHIFT) & WM8960_DACCTL2_DACSLOPE_MASK) |
| #define WM8960_DACCTL2_DACSLOPE_SHIFT (1U) |
| #define WM8960_DACCTL2_DACSMM_GET | ( | x | ) | (((uint16_t)(x) & WM8960_DACCTL2_DACSMM_MASK) >> WM8960_DACCTL2_DACSMM_SHIFT) |
| #define WM8960_DACCTL2_DACSMM_MASK (0x8U) |
| #define WM8960_DACCTL2_DACSMM_SET | ( | x | ) | (((uint16_t)(x) << WM8960_DACCTL2_DACSMM_SHIFT) & WM8960_DACCTL2_DACSMM_MASK) |
| #define WM8960_DACCTL2_DACSMM_SHIFT (3U) |
| #define WM8960_IFACE1 0x7U /* Audio Interface */ |
| #define WM8960_IFACE1_ALRSWAP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_ALRSWAP_MASK) >> WM8960_IFACE1_ALRSWAP_SHIFT) |
| #define WM8960_IFACE1_ALRSWAP_MASK (0x100U) |
| #define WM8960_IFACE1_ALRSWAP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_ALRSWAP_SHIFT) & WM8960_IFACE1_ALRSWAP_MASK) |
| #define WM8960_IFACE1_ALRSWAP_SHIFT (8U) |
| #define WM8960_IFACE1_BCLKINV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_BCLKINV_MASK) >> WM8960_IFACE1_BCLKINV_SHIFT) |
| #define WM8960_IFACE1_BCLKINV_MASK (0x80U) |
| #define WM8960_IFACE1_BCLKINV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_BCLKINV_SHIFT) & WM8960_IFACE1_BCLKINV_MASK) |
| #define WM8960_IFACE1_BCLKINV_SHIFT (7U) |
| #define WM8960_IFACE1_DLRSWAP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_DLRSWAP_MASK) >> WM8960_IFACE1_DLRSWAP_SHIFT) |
| #define WM8960_IFACE1_DLRSWAP_MASK (0x20U) |
| #define WM8960_IFACE1_DLRSWAP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_DLRSWAP_SHIFT) & WM8960_IFACE1_DLRSWAP_MASK) |
| #define WM8960_IFACE1_DLRSWAP_SHIFT (5U) |
| #define WM8960_IFACE1_FORMAT_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_FORMAT_MASK) >> WM8960_IFACE1_FORMAT_SHIFT) |
| #define WM8960_IFACE1_FORMAT_MASK (0x3U) |
| #define WM8960_IFACE1_FORMAT_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_FORMAT_SHIFT) & WM8960_IFACE1_FORMAT_MASK) |
| #define WM8960_IFACE1_FORMAT_SHIFT (0U) |
| #define WM8960_IFACE1_LRP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_LRP_MASK) >> WM8960_IFACE1_LRP_SHIFT) |
| #define WM8960_IFACE1_LRP_MASK (0x10U) |
| #define WM8960_IFACE1_LRP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_LRP_SHIFT) & WM8960_IFACE1_LRP_MASK) |
| #define WM8960_IFACE1_LRP_SHIFT (4U) |
| #define WM8960_IFACE1_MS_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_MS_MASK) >> WM8960_IFACE1_MS_SHIFT) |
| #define WM8960_IFACE1_MS_MASK (0x40U) |
| #define WM8960_IFACE1_MS_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_MS_SHIFT) & WM8960_IFACE1_MS_MASK) |
| #define WM8960_IFACE1_MS_SHIFT (6U) |
| #define WM8960_IFACE1_WL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE1_WL_MASK) >> WM8960_IFACE1_WL_SHIFT) |
| #define WM8960_IFACE1_WL_MASK (0xCU) |
| #define WM8960_IFACE1_WL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE1_WL_SHIFT) & WM8960_IFACE1_WL_MASK) |
| #define WM8960_IFACE1_WL_SHIFT (2U) |
| #define WM8960_IFACE2 0x9U /* Audio Interface */ |
| #define WM8960_IFACE2_ADCCOMP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE2_ADCCOMP_MASK) >> WM8960_IFACE2_ADCCOMP_SHIFT) |
| #define WM8960_IFACE2_ADCCOMP_MASK (0x6U) |
| #define WM8960_IFACE2_ADCCOMP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE2_ADCCOMP_SHIFT) & WM8960_IFACE2_ADCCOMP_MASK) |
| #define WM8960_IFACE2_ADCCOMP_SHIFT (1U) |
| #define WM8960_IFACE2_ALRCGPIO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE2_ALRCGPIO_MASK) >> WM8960_IFACE2_ALRCGPIO_SHIFT) |
| #define WM8960_IFACE2_ALRCGPIO_MASK (0x40U) |
| #define WM8960_IFACE2_ALRCGPIO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE2_ALRCGPIO_SHIFT) & WM8960_IFACE2_ALRCGPIO_MASK) |
| #define WM8960_IFACE2_ALRCGPIO_SHIFT (6U) |
| #define WM8960_IFACE2_DACCOMP_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE2_DACCOMP_MASK) >> WM8960_IFACE2_DACCOMP_SHIFT) |
| #define WM8960_IFACE2_DACCOMP_MASK (0x18U) |
| #define WM8960_IFACE2_DACCOMP_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE2_DACCOMP_SHIFT) & WM8960_IFACE2_DACCOMP_MASK) |
| #define WM8960_IFACE2_DACCOMP_SHIFT (3U) |
| #define WM8960_IFACE2_LOOPBACK_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE2_LOOPBACK_MASK) >> WM8960_IFACE2_LOOPBACK_SHIFT) |
| #define WM8960_IFACE2_LOOPBACK_MASK (0x1U) |
| #define WM8960_IFACE2_LOOPBACK_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE2_LOOPBACK_SHIFT) & WM8960_IFACE2_LOOPBACK_MASK) |
| #define WM8960_IFACE2_LOOPBACK_SHIFT (0U) |
| #define WM8960_IFACE2_WL8_GET | ( | x | ) | (((uint16_t)(x) & WM8960_IFACE2_WL8_MASK) >> WM8960_IFACE2_WL8_SHIFT) |
| #define WM8960_IFACE2_WL8_MASK (0x20U) |
| #define WM8960_IFACE2_WL8_SET | ( | x | ) | (((uint16_t)(x) << WM8960_IFACE2_WL8_SHIFT) & WM8960_IFACE2_WL8_MASK) |
| #define WM8960_IFACE2_WL8_SHIFT (5U) |
| #define WM8960_INBMIX1 0x2bU /* Left Input Boost Mixer */ |
| #define WM8960_INBMIX1_LIN2BOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_INBMIX1_LIN2BOOST_MASK) >> WM8960_INBMIX1_LIN2BOOST_SHIFT) |
| #define WM8960_INBMIX1_LIN2BOOST_MASK (0xEU) |
| #define WM8960_INBMIX1_LIN2BOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_INBMIX1_LIN2BOOST_SHIFT) & WM8960_INBMIX1_LIN2BOOST_MASK) |
| #define WM8960_INBMIX1_LIN2BOOST_SHIFT (1U) |
| #define WM8960_INBMIX1_LIN3BOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_INBMIX1_LIN3BOOST_MASK) >> WM8960_INBMIX1_LIN3BOOST_SHIFT) |
| #define WM8960_INBMIX1_LIN3BOOST_MASK (0x70U) |
| #define WM8960_INBMIX1_LIN3BOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_INBMIX1_LIN3BOOST_SHIFT) & WM8960_INBMIX1_LIN3BOOST_MASK) |
| #define WM8960_INBMIX1_LIN3BOOST_SHIFT (4U) |
| #define WM8960_INBMIX2 0x2cU /* Right Input Boost Mixer */ |
| #define WM8960_INBMIX2_RIN2BOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_INBMIX2_RIN2BOOST_MASK) >> WM8960_INBMIX2_RIN2BOOST_SHIFT) |
| #define WM8960_INBMIX2_RIN2BOOST_MASK (0xEU) |
| #define WM8960_INBMIX2_RIN2BOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_INBMIX2_RIN2BOOST_SHIFT) & WM8960_INBMIX2_RIN2BOOST_MASK) |
| #define WM8960_INBMIX2_RIN2BOOST_SHIFT (1U) |
| #define WM8960_INBMIX2_RIN3BOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_INBMIX2_RIN3BOOST_MASK) >> WM8960_INBMIX2_RIN3BOOST_SHIFT) |
| #define WM8960_INBMIX2_RIN3BOOST_MASK (0x70U) |
| #define WM8960_INBMIX2_RIN3BOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_INBMIX2_RIN3BOOST_SHIFT) & WM8960_INBMIX2_RIN3BOOST_MASK) |
| #define WM8960_INBMIX2_RIN3BOOST_SHIFT (4U) |
| #define WM8960_LADC 0x15U /* Left ADC Volume */ |
| #define WM8960_LADC_ADCVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LADC_ADCVU_MASK) >> WM8960_LADC_ADCVU_SHIFT) |
| #define WM8960_LADC_ADCVU_MASK (0x100U) |
| #define WM8960_LADC_ADCVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LADC_ADCVU_SHIFT) & WM8960_LADC_ADCVU_MASK) |
| #define WM8960_LADC_ADCVU_SHIFT (8U) |
| #define WM8960_LADC_LADCVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LADC_LADCVOL_MASK) >> WM8960_LADC_LADCVOL_SHIFT) |
| #define WM8960_LADC_LADCVOL_MASK (0xFFU) |
| #define WM8960_LADC_LADCVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LADC_LADCVOL_SHIFT) & WM8960_LADC_LADCVOL_MASK) |
| #define WM8960_LADC_LADCVOL_SHIFT (0U) |
| #define WM8960_LDAC 0xaU /* Left DAC */ |
| #define WM8960_LDAC_DACVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LDAC_DACVU_MASK) >> WM8960_LDAC_DACVU_SHIFT) |
| #define WM8960_LDAC_DACVU_MASK (0x100U) |
| #define WM8960_LDAC_DACVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LDAC_DACVU_SHIFT) & WM8960_LDAC_DACVU_MASK) |
| #define WM8960_LDAC_DACVU_SHIFT (8U) |
| #define WM8960_LDAC_LDACVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LDAC_LDACVOL_MASK) >> WM8960_LDAC_LDACVOL_SHIFT) |
| #define WM8960_LDAC_LDACVOL_MASK (0xFFU) |
| #define WM8960_LDAC_LDACVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LDAC_LDACVOL_SHIFT) & WM8960_LDAC_LDACVOL_MASK) |
| #define WM8960_LDAC_LDACVOL_SHIFT (0U) |
| #define WM8960_LINPATH 0x20U /* ADCL Signal Path */ |
| #define WM8960_LINPATH_LMIC2B_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINPATH_LMIC2B_MASK) >> WM8960_LINPATH_LMIC2B_SHIFT) |
| #define WM8960_LINPATH_LMIC2B_MASK (0x8U) |
| #define WM8960_LINPATH_LMIC2B_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINPATH_LMIC2B_SHIFT) & WM8960_LINPATH_LMIC2B_MASK) |
| #define WM8960_LINPATH_LMIC2B_SHIFT (3U) |
| #define WM8960_LINPATH_LMICBOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINPATH_LMICBOOST_MASK) >> WM8960_LINPATH_LMICBOOST_SHIFT) |
| #define WM8960_LINPATH_LMICBOOST_MASK (0x30U) |
| #define WM8960_LINPATH_LMICBOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINPATH_LMICBOOST_SHIFT) & WM8960_LINPATH_LMICBOOST_MASK) |
| #define WM8960_LINPATH_LMICBOOST_SHIFT (4U) |
| #define WM8960_LINPATH_LMN1_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINPATH_LMN1_MASK) >> WM8960_LINPATH_LMN1_SHIFT) |
| #define WM8960_LINPATH_LMN1_MASK (0x100U) |
| #define WM8960_LINPATH_LMN1_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINPATH_LMN1_SHIFT) & WM8960_LINPATH_LMN1_MASK) |
| #define WM8960_LINPATH_LMN1_SHIFT (8U) |
| #define WM8960_LINPATH_LMP2_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINPATH_LMP2_MASK) >> WM8960_LINPATH_LMP2_SHIFT) |
| #define WM8960_LINPATH_LMP2_MASK (0x40U) |
| #define WM8960_LINPATH_LMP2_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINPATH_LMP2_SHIFT) & WM8960_LINPATH_LMP2_MASK) |
| #define WM8960_LINPATH_LMP2_SHIFT (6U) |
| #define WM8960_LINPATH_LMP3_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINPATH_LMP3_MASK) >> WM8960_LINPATH_LMP3_SHIFT) |
| #define WM8960_LINPATH_LMP3_MASK (0x80U) |
| #define WM8960_LINPATH_LMP3_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINPATH_LMP3_SHIFT) & WM8960_LINPATH_LMP3_MASK) |
| #define WM8960_LINPATH_LMP3_SHIFT (7U) |
| #define WM8960_LINVO_IPVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINVO_IPVU_MASK) >> WM8960_LINVO_IPVU_SHIFT) |
| #define WM8960_LINVO_IPVU_MASK (0x100U) |
| #define WM8960_LINVO_IPVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINVO_IPVU_SHIFT) & WM8960_LINVO_IPVU_MASK) |
| #define WM8960_LINVO_IPVU_SHIFT (8U) |
| #define WM8960_LINVO_LINMUTE_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINVO_LINMUTE_MASK) >> WM8960_LINVO_LINMUTE_SHIFT) |
| #define WM8960_LINVO_LINMUTE_MASK (0x80U) |
| #define WM8960_LINVO_LINMUTE_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINVO_LINMUTE_SHIFT) & WM8960_LINVO_LINMUTE_MASK) |
| #define WM8960_LINVO_LINMUTE_SHIFT (7U) |
| #define WM8960_LINVO_LINVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINVO_LINVOL_MASK) >> WM8960_LINVO_LINVOL_SHIFT) |
| #define WM8960_LINVO_LINVOL_MASK (0x3FU) |
| #define WM8960_LINVO_LINVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINVO_LINVOL_SHIFT) & WM8960_LINVO_LINVOL_MASK) |
| #define WM8960_LINVO_LINVOL_SHIFT (0U) |
| #define WM8960_LINVO_LIZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LINVO_LIZC_MASK) >> WM8960_LINVO_LIZC_SHIFT) |
| #define WM8960_LINVO_LIZC_MASK (0x40U) |
| #define WM8960_LINVO_LIZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LINVO_LIZC_SHIFT) & WM8960_LINVO_LIZC_MASK) |
| #define WM8960_LINVO_LIZC_SHIFT (6U) |
| #define WM8960_LINVOL 0x0U /* Left Input Volume */ |
| #define WM8960_LOUT1 0x2U /* LOUT1 Volume */ |
| #define WM8960_LOUT1_LO1ZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT1_LO1ZC_MASK) >> WM8960_LOUT1_LO1ZC_SHIFT) |
| #define WM8960_LOUT1_LO1ZC_MASK (0x80U) |
| #define WM8960_LOUT1_LO1ZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT1_LO1ZC_SHIFT) & WM8960_LOUT1_LO1ZC_MASK) |
| #define WM8960_LOUT1_LO1ZC_SHIFT (7U) |
| #define WM8960_LOUT1_LOUT1VOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT1_LOUT1VOL_MASK) >> WM8960_LOUT1_LOUT1VOL_SHIFT) |
| #define WM8960_LOUT1_LOUT1VOL_MASK (0x7FU) |
| #define WM8960_LOUT1_LOUT1VOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT1_LOUT1VOL_SHIFT) & WM8960_LOUT1_LOUT1VOL_MASK) |
| #define WM8960_LOUT1_LOUT1VOL_SHIFT (0U) |
| #define WM8960_LOUT1_OUT1VU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT1_OUT1VU_MASK) >> WM8960_LOUT1_OUT1VU_SHIFT) |
| #define WM8960_LOUT1_OUT1VU_MASK (0x100U) |
| #define WM8960_LOUT1_OUT1VU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT1_OUT1VU_SHIFT) & WM8960_LOUT1_OUT1VU_MASK) |
| #define WM8960_LOUT1_OUT1VU_SHIFT (8U) |
| #define WM8960_LOUT2 0x28U /* Left Speaker Volume */ |
| #define WM8960_LOUT2_SPKLVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT2_SPKLVOL_MASK) >> WM8960_LOUT2_SPKLVOL_SHIFT) |
| #define WM8960_LOUT2_SPKLVOL_MASK (0x7FU) |
| #define WM8960_LOUT2_SPKLVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT2_SPKLVOL_SHIFT) & WM8960_LOUT2_SPKLVOL_MASK) |
| #define WM8960_LOUT2_SPKLVOL_SHIFT (0U) |
| #define WM8960_LOUT2_SPKLZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT2_SPKLZC_MASK) >> WM8960_LOUT2_SPKLZC_SHIFT) |
| #define WM8960_LOUT2_SPKLZC_MASK (0x80U) |
| #define WM8960_LOUT2_SPKLZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT2_SPKLZC_SHIFT) & WM8960_LOUT2_SPKLZC_MASK) |
| #define WM8960_LOUT2_SPKLZC_SHIFT (7U) |
| #define WM8960_LOUT2_SPKVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUT2_SPKVU_MASK) >> WM8960_LOUT2_SPKVU_SHIFT) |
| #define WM8960_LOUT2_SPKVU_MASK (0x100U) |
| #define WM8960_LOUT2_SPKVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUT2_SPKVU_SHIFT) & WM8960_LOUT2_SPKVU_MASK) |
| #define WM8960_LOUT2_SPKVU_SHIFT (8U) |
| #define WM8960_LOUTMIX 0x22U /* Left Out Mix */ |
| #define WM8960_LOUTMIX_LD2LO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUTMIX_LD2LO_MASK) >> WM8960_LOUTMIX_LD2LO_SHIFT) |
| #define WM8960_LOUTMIX_LD2LO_MASK (0x100U) |
| #define WM8960_LOUTMIX_LD2LO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUTMIX_LD2LO_SHIFT) & WM8960_LOUTMIX_LD2LO_MASK) |
| #define WM8960_LOUTMIX_LD2LO_SHIFT (8U) |
| #define WM8960_LOUTMIX_LI2LO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUTMIX_LI2LO_MASK) >> WM8960_LOUTMIX_LI2LO_SHIFT) |
| #define WM8960_LOUTMIX_LI2LO_MASK (0x80U) |
| #define WM8960_LOUTMIX_LI2LO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUTMIX_LI2LO_SHIFT) & WM8960_LOUTMIX_LI2LO_MASK) |
| #define WM8960_LOUTMIX_LI2LO_SHIFT (7U) |
| #define WM8960_LOUTMIX_LI2LOVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_LOUTMIX_LI2LOVOL_MASK) >> WM8960_LOUTMIX_LI2LOVOL_SHIFT) |
| #define WM8960_LOUTMIX_LI2LOVOL_MASK (0x70U) |
| #define WM8960_LOUTMIX_LI2LOVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_LOUTMIX_LI2LOVOL_SHIFT) & WM8960_LOUTMIX_LI2LOVOL_MASK) |
| #define WM8960_LOUTMIX_LI2LOVOL_SHIFT (4U) |
| #define WM8960_MONO 0x2aU /* OUT3 Volume */ |
| #define WM8960_MONO_MOUTVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_MONO_MOUTVOL_MASK) >> WM8960_MONO_MOUTVOL_SHIFT) |
| #define WM8960_MONO_MOUTVOL_MASK (0x40U) |
| #define WM8960_MONO_MOUTVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_MONO_MOUTVOL_SHIFT) & WM8960_MONO_MOUTVOL_MASK) |
| #define WM8960_MONO_MOUTVOL_SHIFT (6U) |
| #define WM8960_MONOMIX1 0x26U /* Mono Out Mix (1) */ |
| #define WM8960_MONOMIX1_L2MO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_MONOMIX1_L2MO_MASK) >> WM8960_MONOMIX1_L2MO_SHIFT) |
| #define WM8960_MONOMIX1_L2MO_MASK (0x80U) |
| #define WM8960_MONOMIX1_L2MO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_MONOMIX1_L2MO_SHIFT) & WM8960_MONOMIX1_L2MO_MASK) |
| #define WM8960_MONOMIX1_L2MO_SHIFT (7U) |
| #define WM8960_MONOMIX2 0x27U /* Mono Out Mix (2) */ |
| #define WM8960_MONOMIX2_R2MO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_MONOMIX2_R2MO_MASK) >> WM8960_MONOMIX2_R2MO_SHIFT) |
| #define WM8960_MONOMIX2_R2MO_MASK (0x80U) |
| #define WM8960_MONOMIX2_R2MO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_MONOMIX2_R2MO_SHIFT) & WM8960_MONOMIX2_R2MO_MASK) |
| #define WM8960_MONOMIX2_R2MO_SHIFT (7U) |
| #define WM8960_NOISEG 0x14U /* Noise Gate */ |
| #define WM8960_NOISEG_NGAT_GET | ( | x | ) | (((uint16_t)(x) & WM8960_NOISEG_NGAT_MASK) >> WM8960_NOISEG_NGAT_SHIFT) |
| #define WM8960_NOISEG_NGAT_MASK (0x1U) |
| #define WM8960_NOISEG_NGAT_SET | ( | x | ) | (((uint16_t)(x) << WM8960_NOISEG_NGAT_SHIFT) & WM8960_NOISEG_NGAT_MASK) |
| #define WM8960_NOISEG_NGAT_SHIFT (0U) |
| #define WM8960_NOISEG_NGTH_GET | ( | x | ) | (((uint16_t)(x) & WM8960_NOISEG_NGTH_MASK) >> WM8960_NOISEG_NGTH_SHIFT) |
| #define WM8960_NOISEG_NGTH_MASK (0xF8U) |
| #define WM8960_NOISEG_NGTH_SET | ( | x | ) | (((uint16_t)(x) << WM8960_NOISEG_NGTH_SHIFT) & WM8960_NOISEG_NGTH_MASK) |
| #define WM8960_NOISEG_NGTH_SHIFT (3U) |
| #define WM8960_PLL1 0x34U /* PLL (1) */ |
| #define WM8960_PLL1_OPCLKDIV_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL1_OPCLKDIV_MASK) >> WM8960_PLL1_OPCLKDIV_SHIFT) |
| #define WM8960_PLL1_OPCLKDIV_MASK (0x1C0U) |
| #define WM8960_PLL1_OPCLKDIV_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL1_OPCLKDIV_SHIFT) & WM8960_PLL1_OPCLKDIV_MASK) |
| #define WM8960_PLL1_OPCLKDIV_SHIFT (6U) |
| #define WM8960_PLL1_PLLN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL1_PLLN_MASK) >> WM8960_PLL1_PLLN_SHIFT) |
| #define WM8960_PLL1_PLLN_MASK (0xFU) |
| #define WM8960_PLL1_PLLN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL1_PLLN_SHIFT) & WM8960_PLL1_PLLN_MASK) |
| #define WM8960_PLL1_PLLN_SHIFT (0U) |
| #define WM8960_PLL1_PLLPRESCALE_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL1_PLLPRESCALE_MASK) >> WM8960_PLL1_PLLPRESCALE_SHIFT) |
| #define WM8960_PLL1_PLLPRESCALE_MASK (0x10U) |
| #define WM8960_PLL1_PLLPRESCALE_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL1_PLLPRESCALE_SHIFT) & WM8960_PLL1_PLLPRESCALE_MASK) |
| #define WM8960_PLL1_PLLPRESCALE_SHIFT (4U) |
| #define WM8960_PLL1_SDM_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL1_SDM_MASK) >> WM8960_PLL1_SDM_SHIFT) |
| #define WM8960_PLL1_SDM_MASK (0x20U) |
| #define WM8960_PLL1_SDM_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL1_SDM_SHIFT) & WM8960_PLL1_SDM_MASK) |
| #define WM8960_PLL1_SDM_SHIFT (5U) |
| #define WM8960_PLL2 0x35U /* PLL (2) */ |
| #define WM8960_PLL2_PLLK_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL2_PLLK_MASK) >> WM8960_PLL2_PLLK_SHIFT) |
| #define WM8960_PLL2_PLLK_MASK (0xFFU) |
| #define WM8960_PLL2_PLLK_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL2_PLLK_SHIFT) & WM8960_PLL2_PLLK_MASK) |
| #define WM8960_PLL2_PLLK_SHIFT (0U) |
| #define WM8960_PLL3 0x36U /* PLL (3) */ |
| #define WM8960_PLL3_PLLK_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL3_PLLK_MASK) >> WM8960_PLL3_PLLK_SHIFT) |
| #define WM8960_PLL3_PLLK_MASK (0xFFU) |
| #define WM8960_PLL3_PLLK_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL3_PLLK_SHIFT) & WM8960_PLL3_PLLK_MASK) |
| #define WM8960_PLL3_PLLK_SHIFT (0U) |
| #define WM8960_PLL4 0x37U /* PLL (4) */ |
| #define WM8960_PLL4_PLLK_GET | ( | x | ) | (((uint16_t)(x) & WM8960_PLL4_PLLK_MASK) >> WM8960_PLL4_PLLK_SHIFT) |
| #define WM8960_PLL4_PLLK_MASK (0xFFU) |
| #define WM8960_PLL4_PLLK_SET | ( | x | ) | (((uint16_t)(x) << WM8960_PLL4_PLLK_SHIFT) & WM8960_PLL4_PLLK_MASK) |
| #define WM8960_PLL4_PLLK_SHIFT (0U) |
| #define WM8960_POWER1 0x19U /* Power Mgmt (1) */ |
| #define WM8960_POWER1_ADCL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_ADCL_MASK) >> WM8960_POWER1_ADCL_SHIFT) |
| #define WM8960_POWER1_ADCL_MASK (0x8U) |
| #define WM8960_POWER1_ADCL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_ADCL_SHIFT) & WM8960_POWER1_ADCL_MASK) |
| #define WM8960_POWER1_ADCL_SHIFT (3U) |
| #define WM8960_POWER1_ADCR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_ADCR_MASK) >> WM8960_POWER1_ADCR_SHIFT) |
| #define WM8960_POWER1_ADCR_MASK (0x4U) |
| #define WM8960_POWER1_ADCR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_ADCR_SHIFT) & WM8960_POWER1_ADCR_MASK) |
| #define WM8960_POWER1_ADCR_SHIFT (2U) |
| #define WM8960_POWER1_AINL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_AINL_MASK) >> WM8960_POWER1_AINL_SHIFT) |
| #define WM8960_POWER1_AINL_MASK (0x20U) |
| #define WM8960_POWER1_AINL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_AINL_SHIFT) & WM8960_POWER1_AINL_MASK) |
| #define WM8960_POWER1_AINL_SHIFT (5U) |
| #define WM8960_POWER1_AINR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_AINR_MASK) >> WM8960_POWER1_AINR_SHIFT) |
| #define WM8960_POWER1_AINR_MASK (0x10U) |
| #define WM8960_POWER1_AINR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_AINR_SHIFT) & WM8960_POWER1_AINR_MASK) |
| #define WM8960_POWER1_AINR_SHIFT (4U) |
| #define WM8960_POWER1_DIGENB_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_DIGENB_MASK) >> WM8960_POWER1_DIGENB_SHIFT) |
| #define WM8960_POWER1_DIGENB_MASK (0x1U) |
| #define WM8960_POWER1_DIGENB_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_DIGENB_SHIFT) & WM8960_POWER1_DIGENB_MASK) |
| #define WM8960_POWER1_DIGENB_SHIFT (0U) |
| #define WM8960_POWER1_MICB_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_MICB_MASK) >> WM8960_POWER1_MICB_SHIFT) |
| #define WM8960_POWER1_MICB_MASK (0x2U) |
| #define WM8960_POWER1_MICB_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_MICB_SHIFT) & WM8960_POWER1_MICB_MASK) |
| #define WM8960_POWER1_MICB_SHIFT (1U) |
| #define WM8960_POWER1_VMIDSEL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_VMIDSEL_MASK) >> WM8960_POWER1_VMIDSEL_SHIFT) |
| #define WM8960_POWER1_VMIDSEL_MASK (0x180U) |
| #define WM8960_POWER1_VMIDSEL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_VMIDSEL_SHIFT) & WM8960_POWER1_VMIDSEL_MASK) |
| #define WM8960_POWER1_VMIDSEL_SHIFT (7U) |
| #define WM8960_POWER1_VREF_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER1_VREF_MASK) >> WM8960_POWER1_VREF_SHIFT) |
| #define WM8960_POWER1_VREF_MASK (0x40U) |
| #define WM8960_POWER1_VREF_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER1_VREF_SHIFT) & WM8960_POWER1_VREF_MASK) |
| #define WM8960_POWER1_VREF_SHIFT (6U) |
| #define WM8960_POWER2 0x1aU /* Power Mgmt (2) */ |
| #define WM8960_POWER2_DACL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_DACL_MASK) >> WM8960_POWER2_DACL_SHIFT) |
| #define WM8960_POWER2_DACL_MASK (0x100U) |
| #define WM8960_POWER2_DACL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_DACL_SHIFT) & WM8960_POWER2_DACL_MASK) |
| #define WM8960_POWER2_DACL_SHIFT (8U) |
| #define WM8960_POWER2_DACR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_DACR_MASK) >> WM8960_POWER2_DACR_SHIFT) |
| #define WM8960_POWER2_DACR_MASK (0x80U) |
| #define WM8960_POWER2_DACR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_DACR_SHIFT) & WM8960_POWER2_DACR_MASK) |
| #define WM8960_POWER2_DACR_SHIFT (7U) |
| #define WM8960_POWER2_LOUT1_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_LOUT1_MASK) >> WM8960_POWER2_LOUT1_SHIFT) |
| #define WM8960_POWER2_LOUT1_MASK (0x40U) |
| #define WM8960_POWER2_LOUT1_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_LOUT1_SHIFT) & WM8960_POWER2_LOUT1_MASK) |
| #define WM8960_POWER2_LOUT1_SHIFT (6U) |
| #define WM8960_POWER2_OUT3_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_OUT3_MASK) >> WM8960_POWER2_OUT3_SHIFT) |
| #define WM8960_POWER2_OUT3_MASK (0x2U) |
| #define WM8960_POWER2_OUT3_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_OUT3_SHIFT) & WM8960_POWER2_OUT3_MASK) |
| #define WM8960_POWER2_OUT3_SHIFT (1U) |
| #define WM8960_POWER2_PLL_EN_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_PLL_EN_MASK) >> WM8960_POWER2_PLL_EN_SHIFT) |
| #define WM8960_POWER2_PLL_EN_MASK (0x1U) |
| #define WM8960_POWER2_PLL_EN_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_PLL_EN_SHIFT) & WM8960_POWER2_PLL_EN_MASK) |
| #define WM8960_POWER2_PLL_EN_SHIFT (0U) |
| #define WM8960_POWER2_ROUT1_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_ROUT1_MASK) >> WM8960_POWER2_ROUT1_SHIFT) |
| #define WM8960_POWER2_ROUT1_MASK (0x20U) |
| #define WM8960_POWER2_ROUT1_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_ROUT1_SHIFT) & WM8960_POWER2_ROUT1_MASK) |
| #define WM8960_POWER2_ROUT1_SHIFT (5U) |
| #define WM8960_POWER2_SPKL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_SPKL_MASK) >> WM8960_POWER2_SPKL_SHIFT) |
| #define WM8960_POWER2_SPKL_MASK (0x10U) |
| #define WM8960_POWER2_SPKL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_SPKL_SHIFT) & WM8960_POWER2_SPKL_MASK) |
| #define WM8960_POWER2_SPKL_SHIFT (4U) |
| #define WM8960_POWER2_SPKR_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER2_SPKR_MASK) >> WM8960_POWER2_SPKR_SHIFT) |
| #define WM8960_POWER2_SPKR_MASK (0x8U) |
| #define WM8960_POWER2_SPKR_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER2_SPKR_SHIFT) & WM8960_POWER2_SPKR_MASK) |
| #define WM8960_POWER2_SPKR_SHIFT (3U) |
| #define WM8960_POWER3 0x2fU /* Power Mgmt (3) */ |
| #define WM8960_POWER3_LMIC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER3_LMIC_MASK) >> WM8960_POWER3_LMIC_SHIFT) |
| #define WM8960_POWER3_LMIC_MASK (0x20U) |
| #define WM8960_POWER3_LMIC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER3_LMIC_SHIFT) & WM8960_POWER3_LMIC_MASK) |
| #define WM8960_POWER3_LMIC_SHIFT (5U) |
| #define WM8960_POWER3_LOMIX_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER3_LOMIX_MASK) >> WM8960_POWER3_LOMIX_SHIFT) |
| #define WM8960_POWER3_LOMIX_MASK (0x8U) |
| #define WM8960_POWER3_LOMIX_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER3_LOMIX_SHIFT) & WM8960_POWER3_LOMIX_MASK) |
| #define WM8960_POWER3_LOMIX_SHIFT (3U) |
| #define WM8960_POWER3_RMIC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER3_RMIC_MASK) >> WM8960_POWER3_RMIC_SHIFT) |
| #define WM8960_POWER3_RMIC_MASK (0x10U) |
| #define WM8960_POWER3_RMIC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER3_RMIC_SHIFT) & WM8960_POWER3_RMIC_MASK) |
| #define WM8960_POWER3_RMIC_SHIFT (4U) |
| #define WM8960_POWER3_ROMIX_GET | ( | x | ) | (((uint16_t)(x) & WM8960_POWER3_ROMIX_MASK) >> WM8960_POWER3_ROMIX_SHIFT) |
| #define WM8960_POWER3_ROMIX_MASK (0x4U) |
| #define WM8960_POWER3_ROMIX_SET | ( | x | ) | (((uint16_t)(x) << WM8960_POWER3_ROMIX_SHIFT) & WM8960_POWER3_ROMIX_MASK) |
| #define WM8960_POWER3_ROMIX_SHIFT (2U) |
| #define WM8960_RADC 0x16U /* Right ADC Volume */ |
| #define WM8960_RADC_ADCVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RADC_ADCVU_MASK) >> WM8960_RADC_ADCVU_SHIFT) |
| #define WM8960_RADC_ADCVU_MASK (0x100U) |
| #define WM8960_RADC_ADCVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RADC_ADCVU_SHIFT) & WM8960_RADC_ADCVU_MASK) |
| #define WM8960_RADC_ADCVU_SHIFT (8U) |
| #define WM8960_RADC_RADCVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RADC_RADCVOL_MASK) >> WM8960_RADC_RADCVOL_SHIFT) |
| #define WM8960_RADC_RADCVOL_MASK (0xFFU) |
| #define WM8960_RADC_RADCVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RADC_RADCVOL_SHIFT) & WM8960_RADC_RADCVOL_MASK) |
| #define WM8960_RADC_RADCVOL_SHIFT (0U) |
| #define WM8960_RDAC 0xbU /* Right DAC Volume */ |
| #define WM8960_RDAC_DACVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RDAC_DACVU_MASK) >> WM8960_RDAC_DACVU_SHIFT) |
| #define WM8960_RDAC_DACVU_MASK (0x100U) |
| #define WM8960_RDAC_DACVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RDAC_DACVU_SHIFT) & WM8960_RDAC_DACVU_MASK) |
| #define WM8960_RDAC_DACVU_SHIFT (8U) |
| #define WM8960_RDAC_RDACVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RDAC_RDACVOL_MASK) >> WM8960_RDAC_RDACVOL_SHIFT) |
| #define WM8960_RDAC_RDACVOL_MASK (0xFFU) |
| #define WM8960_RDAC_RDACVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RDAC_RDACVOL_SHIFT) & WM8960_RDAC_RDACVOL_MASK) |
| #define WM8960_RDAC_RDACVOL_SHIFT (0U) |
| #define WM8960_REG_NUM 56U |
| #define WM8960_RESET 0xfU /* RESET */ |
| #define WM8960_RESET_RESET_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RESET_RESET_MASK) >> WM8960_RESET_RESET_SHIFT) |
| #define WM8960_RESET_RESET_MASK (0x1FFU) |
| #define WM8960_RESET_RESET_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RESET_RESET_SHIFT) & WM8960_RESET_RESET_MASK) |
| #define WM8960_RESET_RESET_SHIFT (0U) |
| #define WM8960_RINPATH 0x21U /* ADCR Signal Path */ |
| #define WM8960_RINPATH_RMIC2B_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINPATH_RMIC2B_MASK) >> WM8960_RINPATH_RMIC2B_SHIFT) |
| #define WM8960_RINPATH_RMIC2B_MASK (0x8U) |
| #define WM8960_RINPATH_RMIC2B_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINPATH_RMIC2B_SHIFT) & WM8960_RINPATH_RMIC2B_MASK) |
| #define WM8960_RINPATH_RMIC2B_SHIFT (3U) |
| #define WM8960_RINPATH_RMICBOOST_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINPATH_RMICBOOST_MASK) >> WM8960_RINPATH_RMICBOOST_SHIFT) |
| #define WM8960_RINPATH_RMICBOOST_MASK (0x30U) |
| #define WM8960_RINPATH_RMICBOOST_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINPATH_RMICBOOST_SHIFT) & WM8960_RINPATH_RMICBOOST_MASK) |
| #define WM8960_RINPATH_RMICBOOST_SHIFT (4U) |
| #define WM8960_RINPATH_RMN1_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINPATH_RMN1_MASK) >> WM8960_RINPATH_RMN1_SHIFT) |
| #define WM8960_RINPATH_RMN1_MASK (0x100U) |
| #define WM8960_RINPATH_RMN1_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINPATH_RMN1_SHIFT) & WM8960_RINPATH_RMN1_MASK) |
| #define WM8960_RINPATH_RMN1_SHIFT (8U) |
| #define WM8960_RINPATH_RMP2_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINPATH_RMP2_MASK) >> WM8960_RINPATH_RMP2_SHIFT) |
| #define WM8960_RINPATH_RMP2_MASK (0x40U) |
| #define WM8960_RINPATH_RMP2_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINPATH_RMP2_SHIFT) & WM8960_RINPATH_RMP2_MASK) |
| #define WM8960_RINPATH_RMP2_SHIFT (6U) |
| #define WM8960_RINPATH_RMP3_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINPATH_RMP3_MASK) >> WM8960_RINPATH_RMP3_SHIFT) |
| #define WM8960_RINPATH_RMP3_MASK (0x80U) |
| #define WM8960_RINPATH_RMP3_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINPATH_RMP3_SHIFT) & WM8960_RINPATH_RMP3_MASK) |
| #define WM8960_RINPATH_RMP3_SHIFT (7U) |
| #define WM8960_RINVOL 0x1U /* Right Input Volume */ |
| #define WM8960_RINVOL_IPVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINVOL_IPVU_MASK) >> WM8960_RINVOL_IPVU_SHIFT) |
| #define WM8960_RINVOL_IPVU_MASK (0x100U) |
| #define WM8960_RINVOL_IPVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINVOL_IPVU_SHIFT) & WM8960_RINVOL_IPVU_MASK) |
| #define WM8960_RINVOL_IPVU_SHIFT (8U) |
| #define WM8960_RINVOL_RINMUTE_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINVOL_RINMUTE_MASK) >> WM8960_RINVOL_RINMUTE_SHIFT) |
| #define WM8960_RINVOL_RINMUTE_MASK (0x80U) |
| #define WM8960_RINVOL_RINMUTE_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINVOL_RINMUTE_SHIFT) & WM8960_RINVOL_RINMUTE_MASK) |
| #define WM8960_RINVOL_RINMUTE_SHIFT (7U) |
| #define WM8960_RINVOL_RINVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINVOL_RINVOL_MASK) >> WM8960_RINVOL_RINVOL_SHIFT) |
| #define WM8960_RINVOL_RINVOL_MASK (0x3FU) |
| #define WM8960_RINVOL_RINVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINVOL_RINVOL_SHIFT) & WM8960_RINVOL_RINVOL_MASK) |
| #define WM8960_RINVOL_RINVOL_SHIFT (0U) |
| #define WM8960_RINVOL_RIZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_RINVOL_RIZC_MASK) >> WM8960_RINVOL_RIZC_SHIFT) |
| #define WM8960_RINVOL_RIZC_MASK (0x40U) |
| #define WM8960_RINVOL_RIZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_RINVOL_RIZC_SHIFT) & WM8960_RINVOL_RIZC_MASK) |
| #define WM8960_RINVOL_RIZC_SHIFT (6U) |
| #define WM8960_ROUT1 0x3U /* ROUT1 Volume */ |
| #define WM8960_ROUT1_OUT1VU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT1_OUT1VU_MASK) >> WM8960_ROUT1_OUT1VU_SHIFT) |
| #define WM8960_ROUT1_OUT1VU_MASK (0x100U) |
| #define WM8960_ROUT1_OUT1VU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT1_OUT1VU_SHIFT) & WM8960_ROUT1_OUT1VU_MASK) |
| #define WM8960_ROUT1_OUT1VU_SHIFT (8U) |
| #define WM8960_ROUT1_RO1ZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT1_RO1ZC_MASK) >> WM8960_ROUT1_RO1ZC_SHIFT) |
| #define WM8960_ROUT1_RO1ZC_MASK (0x80U) |
| #define WM8960_ROUT1_RO1ZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT1_RO1ZC_SHIFT) & WM8960_ROUT1_RO1ZC_MASK) |
| #define WM8960_ROUT1_RO1ZC_SHIFT (7U) |
| #define WM8960_ROUT1_ROUT1VOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT1_ROUT1VOL_MASK) >> WM8960_ROUT1_ROUT1VOL_SHIFT) |
| #define WM8960_ROUT1_ROUT1VOL_MASK (0x7FU) |
| #define WM8960_ROUT1_ROUT1VOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT1_ROUT1VOL_SHIFT) & WM8960_ROUT1_ROUT1VOL_MASK) |
| #define WM8960_ROUT1_ROUT1VOL_SHIFT (0U) |
| #define WM8960_ROUT2 0x29U /* Right Speaker Volume */ |
| #define WM8960_ROUT2_SPKRVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT2_SPKRVOL_MASK) >> WM8960_ROUT2_SPKRVOL_SHIFT) |
| #define WM8960_ROUT2_SPKRVOL_MASK (0x7FU) |
| #define WM8960_ROUT2_SPKRVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT2_SPKRVOL_SHIFT) & WM8960_ROUT2_SPKRVOL_MASK) |
| #define WM8960_ROUT2_SPKRVOL_SHIFT (0U) |
| #define WM8960_ROUT2_SPKRZC_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT2_SPKRZC_MASK) >> WM8960_ROUT2_SPKRZC_SHIFT) |
| #define WM8960_ROUT2_SPKRZC_MASK (0x80U) |
| #define WM8960_ROUT2_SPKRZC_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT2_SPKRZC_SHIFT) & WM8960_ROUT2_SPKRZC_MASK) |
| #define WM8960_ROUT2_SPKRZC_SHIFT (7U) |
| #define WM8960_ROUT2_SPKVU_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUT2_SPKVU_MASK) >> WM8960_ROUT2_SPKVU_SHIFT) |
| #define WM8960_ROUT2_SPKVU_MASK (0x100U) |
| #define WM8960_ROUT2_SPKVU_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUT2_SPKVU_SHIFT) & WM8960_ROUT2_SPKVU_MASK) |
| #define WM8960_ROUT2_SPKVU_SHIFT (8U) |
| #define WM8960_ROUTMIX 0x25U /* Right Out Mix */ |
| #define WM8960_ROUTMIX_RD2RO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUTMIX_RD2RO_MASK) >> WM8960_ROUTMIX_RD2RO_SHIFT) |
| #define WM8960_ROUTMIX_RD2RO_MASK (0x100U) |
| #define WM8960_ROUTMIX_RD2RO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUTMIX_RD2RO_SHIFT) & WM8960_ROUTMIX_RD2RO_MASK) |
| #define WM8960_ROUTMIX_RD2RO_SHIFT (8U) |
| #define WM8960_ROUTMIX_RI2RO_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUTMIX_RI2RO_MASK) >> WM8960_ROUTMIX_RI2RO_SHIFT) |
| #define WM8960_ROUTMIX_RI2RO_MASK (0x80U) |
| #define WM8960_ROUTMIX_RI2RO_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUTMIX_RI2RO_SHIFT) & WM8960_ROUTMIX_RI2RO_MASK) |
| #define WM8960_ROUTMIX_RI2RO_SHIFT (7U) |
| #define WM8960_ROUTMIX_RI2ROVOL_GET | ( | x | ) | (((uint16_t)(x) & WM8960_ROUTMIX_RI2ROVOL_MASK) >> WM8960_ROUTMIX_RI2ROVOL_SHIFT) |
| #define WM8960_ROUTMIX_RI2ROVOL_MASK (0x70U) |
| #define WM8960_ROUTMIX_RI2ROVOL_SET | ( | x | ) | (((uint16_t)(x) << WM8960_ROUTMIX_RI2ROVOL_SHIFT) & WM8960_ROUTMIX_RI2ROVOL_MASK) |
| #define WM8960_ROUTMIX_RI2ROVOL_SHIFT (4U) |
1.9.1