DP83867 Ethernet PHY driver header file. More...
Go to the source code of this file.
Data Structures | |
| struct | dp83867_config_t |
| DP83867 PHY configuration structure. More... | |
Macros | |
| #define | DP83867_ADDR (0U) |
| Default PHY address for DP83867. More... | |
| #define | DP83867_ID1 (0x2000U) |
| DP83867 PHY ID register 1 value (OUI MSB) More... | |
| #define | DP83867_ID2 (0x28U) |
| DP83867 PHY ID register 2 value (OUI LSB) More... | |
Enumerations | |
| enum | dp83867_rgmii_rx_delay_t { DP83867_RX_DELAY_0P25_NS = 0 , DP83867_RX_DELAY_0P50_NS , DP83867_RX_DELAY_0P75_NS , DP83867_RX_DELAY_1P00_NS , DP83867_RX_DELAY_1P25_NS , DP83867_RX_DELAY_1P50_NS , DP83867_RX_DELAY_1P75_NS , DP83867_RX_DELAY_2P00_NS , DP83867_RX_DELAY_2P25_NS , DP83867_RX_DELAY_2P50_NS , DP83867_RX_DELAY_2P75_NS , DP83867_RX_DELAY_3P00_NS , DP83867_RX_DELAY_3P25_NS , DP83867_RX_DELAY_3P50_NS , DP83867_RX_DELAY_3P75_NS , DP83867_RX_DELAY_4P00_NS } |
| DP83867 RGMII RX delay configuration. More... | |
Functions | |
| bool | dp83867_reset (ENET_Type *ptr, uint32_t phy_addr) |
| Reset DP83867 PHY chip. More... | |
| void | dp83867_basic_mode_default_config (ENET_Type *ptr, dp83867_config_t *config) |
| Set default configuration for DP83867 PHY basic mode. More... | |
| bool | dp83867_basic_mode_init (ENET_Type *ptr, uint32_t phy_addr, dp83867_config_t *config) |
| Initialize DP83867 PHY chip in basic mode. More... | |
| void | dp83867_get_phy_status (ENET_Type *ptr, uint32_t phy_addr, enet_phy_status_t *status) |
| Get DP83867 PHY status. More... | |
| void | dp83867_set_mdi_crossover_mode (ENET_Type *ptr, uint32_t phy_addr, enet_phy_crossover_mode_t mode) |
| Set MDI crossover mode for DP83867 PHY. More... | |
DP83867 Ethernet PHY driver header file.
This file provides the API definitions for the DP83867 Ethernet PHY chip driver. The DP83867 is a single-port 10/100/1000-Mbps Ethernet physical layer transceiver.
| #define DP83867_ADDR (0U) |
Default PHY address for DP83867.
| #define DP83867_ID1 (0x2000U) |
DP83867 PHY ID register 1 value (OUI MSB)
| #define DP83867_ID2 (0x28U) |
DP83867 PHY ID register 2 value (OUI LSB)
DP83867 RGMII RX delay configuration.
This enumeration defines the available RX delay values for RGMII interface timing adjustment.
| void dp83867_basic_mode_default_config | ( | ENET_Type * | ptr, |
| dp83867_config_t * | config | ||
| ) |
Set default configuration for DP83867 PHY basic mode.
| [in] | ptr | Pointer to the ENET peripheral base address |
| [out] | config | Pointer to the configuration structure to be initialized |
This function initializes the configuration structure with default values:
| bool dp83867_basic_mode_init | ( | ENET_Type * | ptr, |
| uint32_t | phy_addr, | ||
| dp83867_config_t * | config | ||
| ) |
Initialize DP83867 PHY chip in basic mode.
| [in] | ptr | Pointer to the ENET peripheral base address |
| [in] | phy_addr | PHY address |
| [in] | config | Pointer to the PHY configuration structure |
| true | Initialization completed successfully |
| false | Initialization failed (PHY ID check failed) |
This function performs the following operations:
| void dp83867_get_phy_status | ( | ENET_Type * | ptr, |
| uint32_t | phy_addr, | ||
| enet_phy_status_t * | status | ||
| ) |
Get DP83867 PHY status.
| [in] | ptr | Pointer to the ENET peripheral base address |
| [in] | phy_addr | PHY address |
| [out] | status | Pointer to the status structure to store PHY status |
This function reads the PHY status register and extracts:
| bool dp83867_reset | ( | ENET_Type * | ptr, |
| uint32_t | phy_addr | ||
| ) |
Reset DP83867 PHY chip.
| [in] | ptr | Pointer to the ENET peripheral base address |
| [in] | phy_addr | PHY address |
| true | Reset operation completed successfully |
| false | Reset operation failed (timeout) |
| void dp83867_set_mdi_crossover_mode | ( | ENET_Type * | ptr, |
| uint32_t | phy_addr, | ||
| enet_phy_crossover_mode_t | mode | ||
| ) |
Set MDI crossover mode for DP83867 PHY.
| [in] | ptr | Pointer to the ENET peripheral base address |
| [in] | phy_addr | PHY address |
| [in] | mode | Crossover mode: enet_phy_crossover_mode_t |
This function configures the MDI/MDIX crossover mode for the PHY. The crossover mode determines how the PHY handles cable connections.