QEOV2_Type Struct Reference

#include <hpm_qeov2_regs.h>

Data Fields
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   VD_INJECT
__R uint8_t   RESERVED0 [8]
__RW uint32_t   VQ_INJECT
__R uint8_t   RESERVED1 [8]
__W uint32_t   VD_VQ_LOAD
__RW uint32_t   AMPLITUDE [3]
__RW uint32_t   MID_POINT [3]
struct {
__RW uint32_t   MIN_LEVEL0
__RW uint32_t   MAX_LEVEL0
}   LIMIT0 [3]
struct {
__RW uint32_t   MIN_LEVEL1
__RW uint32_t   MAX_LEVEL1
}   LIMIT1 [3]
__RW uint32_t   DEADZONE_SHIFT [3]
__RW uint32_t   PWM_CYCLE
__RW uint32_t   FILTER
}	WAVE
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   LINE_WIDTH
__RW uint32_t   WDOG_WIDTH
__W uint32_t   POSTION_SYNC
__RW uint32_t   OVERALL_OFFSET
__RW uint32_t   FILTER
}	ABZ
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [4]
__RW uint32_t   PHASE_TABLE [24]
__RW uint32_t   FILTER
}	PWM
__R uint8_t	RESERVED2 [60]
__RW uint32_t	POSTION_SOFTWARE
__RW uint32_t	POSTION_SEL
__R uint32_t	STATUS
__R uint32_t	DEBUG0
__R uint32_t	DEBUG1
__R uint32_t	DEBUG2
__R uint32_t	DEBUG3
__R uint32_t	DEBUG4
__R uint32_t	DEBUG5
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   VD_INJECT
__R uint8_t   RESERVED0 [8]
__RW uint32_t   VQ_INJECT
__R uint8_t   RESERVED1 [8]
__W uint32_t   VD_VQ_LOAD
__RW uint32_t   AMPLITUDE [3]
__RW uint32_t   MID_POINT [3]
struct {
__RW uint32_t   MIN_LEVEL0
__RW uint32_t   MAX_LEVEL0
}   LIMIT0 [3]
struct {
__RW uint32_t   MIN_LEVEL1
__RW uint32_t   MAX_LEVEL1
}   LIMIT1 [3]
__RW uint32_t   DEADZONE_SHIFT [3]
__RW uint32_t   PWM_CYCLE
}	WAVE
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   LINE_WIDTH
__RW uint32_t   WDOG_WIDTH
__W uint32_t   POSTION_SYNC
__RW uint32_t   OVERALL_OFFSET
}	ABZ
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [4]
__RW uint32_t   PHASE_TABLE [24]
}	PWM
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   VD_INJECT
__R uint8_t   RESERVED0 [8]
__RW uint32_t   VQ_INJECT
__R uint8_t   RESERVED1 [8]
__W uint32_t   VD_VQ_LOAD
__RW uint32_t   AMPLITUDE [3]
__RW uint32_t   MID_POINT [3]
struct {
__RW uint32_t   MIN_LEVEL0
__RW uint32_t   MAX_LEVEL0
}   LIMIT0 [3]
struct {
__RW uint32_t   MIN_LEVEL1
__RW uint32_t   MAX_LEVEL1
}   LIMIT1 [3]
__RW uint32_t   DEADZONE_SHIFT [3]
__RW uint32_t   PWM_CYCLE
}	WAVE
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [3]
__RW uint32_t   LINE_WIDTH
__RW uint32_t   WDOG_WIDTH
__W uint32_t   POSTION_SYNC
__RW uint32_t   OVERALL_OFFSET
}	ABZ
struct {
__RW uint32_t   MODE
__RW uint32_t   RESOLUTION
__RW uint32_t   PHASE_SHIFT [4]
__RW uint32_t   PHASE_TABLE [24]
}	PWM

Field Documentation

[1/3]

struct { ... } QEOV2_Type::ABZ

[2/3]

struct { ... } QEOV2_Type::ABZ

[3/3]

struct { ... } QEOV2_Type::ABZ

AMPLITUDE

__RW uint32_t QEOV2_Type::AMPLITUDE[3]

DEADZONE_SHIFT

__RW uint32_t QEOV2_Type::DEADZONE_SHIFT[3]

DEBUG0

__R uint32_t QEOV2_Type::DEBUG0

DEBUG1

__R uint32_t QEOV2_Type::DEBUG1

DEBUG2

__R uint32_t QEOV2_Type::DEBUG2

DEBUG3

__R uint32_t QEOV2_Type::DEBUG3

DEBUG4

__R uint32_t QEOV2_Type::DEBUG4

DEBUG5

__R uint32_t QEOV2_Type::DEBUG5

FILTER

__RW uint32_t QEOV2_Type::FILTER

[1/3]

struct { ... } QEOV2_Type::LIMIT0[3]

[2/3]

struct { ... } QEOV2_Type::LIMIT0[3]

[3/3]

struct { ... } QEOV2_Type::LIMIT0[3]

[1/3]

struct { ... } QEOV2_Type::LIMIT1[3]

[2/3]

struct { ... } QEOV2_Type::LIMIT1[3]

[3/3]

struct { ... } QEOV2_Type::LIMIT1[3]

LINE_WIDTH

__RW uint32_t QEOV2_Type::LINE_WIDTH

MAX_LEVEL0

__RW uint32_t QEOV2_Type::MAX_LEVEL0

MAX_LEVEL1

__RW uint32_t QEOV2_Type::MAX_LEVEL1

MID_POINT

__RW uint32_t QEOV2_Type::MID_POINT[3]

MIN_LEVEL0

__RW uint32_t QEOV2_Type::MIN_LEVEL0

MIN_LEVEL1

__RW uint32_t QEOV2_Type::MIN_LEVEL1

MODE

__RW uint32_t QEOV2_Type::MODE

OVERALL_OFFSET

__RW uint32_t QEOV2_Type::OVERALL_OFFSET

PHASE_SHIFT

__RW uint32_t QEOV2_Type::PHASE_SHIFT[4]

PHASE_TABLE

__RW uint32_t QEOV2_Type::PHASE_TABLE[24]

POSTION_SEL

__RW uint32_t QEOV2_Type::POSTION_SEL

POSTION_SOFTWARE

__RW uint32_t QEOV2_Type::POSTION_SOFTWARE

POSTION_SYNC

__W uint32_t QEOV2_Type::POSTION_SYNC

[1/3]

struct { ... } QEOV2_Type::PWM

[2/3]

struct { ... } QEOV2_Type::PWM

[3/3]

struct { ... } QEOV2_Type::PWM

PWM_CYCLE

__RW uint32_t QEOV2_Type::PWM_CYCLE

RESERVED0

__R uint8_t QEOV2_Type::RESERVED0

RESERVED1

__R uint8_t QEOV2_Type::RESERVED1

RESERVED2

__R uint8_t QEOV2_Type::RESERVED2

RESOLUTION

__RW uint32_t QEOV2_Type::RESOLUTION

STATUS

__R uint32_t QEOV2_Type::STATUS

VD_INJECT

__RW uint32_t QEOV2_Type::VD_INJECT

VD_VQ_LOAD

__W uint32_t QEOV2_Type::VD_VQ_LOAD

VQ_INJECT

__RW uint32_t QEOV2_Type::VQ_INJECT

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struct { ... } QEOV2_Type::WAVE

[2/3]

struct { ... } QEOV2_Type::WAVE

[3/3]

struct { ... } QEOV2_Type::WAVE

WDOG_WIDTH

__RW uint32_t QEOV2_Type::WDOG_WIDTH

---

The documentation for this struct was generated from the following file:

• /home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/soc/HPM5E00/ip/hpm_qeov2_regs.h