pulse counter config structure More...

#include <hpm_pdgo_drv.h>

Data Fields
bool	enable

bool	dir_invert_en

uint8_t	phase_bias

dgo_wuio_pin_num_t	a_sel

dgo_wuio_pin_num_t	b_sel

dgo_wuio_pin_num_t	h_sel

dgo_pcnt_decode_mode_t	decode_mode

uint32_t	resolution

dgo_pcnt_h_mode_t	h_mode

dgo_pcnt_sig_state_t	h_state

dgo_pcnt_dump_mode_t	dump_mode

dgo_pcnt_sig_state_t	dump_state

dgo_pcnt_tacho_mode_t	tacho_mode

uint16_t	tacho_len

dgo_pcnt_cmp_mode_t	cmp0_mode

dgo_pcnt_range_cmp_src_t	range_cmp_src

uint32_t	cmp0_value

uint32_t	cmp1_value

Detailed Description

pulse counter config structure

Field Documentation

◆ a_sel

dgo_wuio_pin_num_t dgo_pcnt_cfg_t::a_sel

◆ b_sel

dgo_wuio_pin_num_t dgo_pcnt_cfg_t::b_sel

◆ cmp0_mode

dgo_pcnt_cmp_mode_t dgo_pcnt_cfg_t::cmp0_mode

◆ cmp0_value

uint32_t dgo_pcnt_cfg_t::cmp0_value

◆ cmp1_value

uint32_t dgo_pcnt_cfg_t::cmp1_value

◆ decode_mode

dgo_pcnt_decode_mode_t dgo_pcnt_cfg_t::decode_mode

◆ dir_invert_en

bool dgo_pcnt_cfg_t::dir_invert_en

◆ dump_mode

dgo_pcnt_dump_mode_t dgo_pcnt_cfg_t::dump_mode

◆ dump_state

dgo_pcnt_sig_state_t dgo_pcnt_cfg_t::dump_state

◆ enable

bool dgo_pcnt_cfg_t::enable

◆ h_mode

dgo_pcnt_h_mode_t dgo_pcnt_cfg_t::h_mode

◆ h_sel

dgo_wuio_pin_num_t dgo_pcnt_cfg_t::h_sel

◆ h_state

dgo_pcnt_sig_state_t dgo_pcnt_cfg_t::h_state

◆ phase_bias

uint8_t dgo_pcnt_cfg_t::phase_bias

◆ range_cmp_src

dgo_pcnt_range_cmp_src_t dgo_pcnt_cfg_t::range_cmp_src

◆ resolution

uint32_t dgo_pcnt_cfg_t::resolution

◆ tacho_len

uint16_t dgo_pcnt_cfg_t::tacho_len

◆ tacho_mode

dgo_pcnt_tacho_mode_t dgo_pcnt_cfg_t::tacho_mode

The documentation for this struct was generated from the following file:

/home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/soc/HPM5E00/HPM5E31/hpm_pdgo_drv.h

Data Fields