65. UART

• 65.1. Use DMA to receive and send UART data
  • 65.1.1. Overview
  • 65.1.2. Port Settings
  • 65.1.3. Note
  • 65.1.4. Running the example
• 65.2. UART hardware rx idle detection
  • 65.2.1. Overview
  • 65.2.2. Port Settings
  • 65.2.3. Board Setting
  • 65.2.4. Running the example
• 65.3. Universal asynchronous transceiver UART
  • 65.3.1. Overview
  • 65.3.2. Port Settings
  • 65.3.3. Notice
  • 65.3.4. Running the example
• 65.4. UART software rx idle detection
  • 65.4.1. Overview
  • 65.4.2. Port Settings
  • 65.4.3. Board Setting
  • 65.4.4. Running the example
• 65.5. UART rx timeout
  • 65.5.1. Overview
  • 65.5.2. Port Settings
  • 65.5.3. Board Setting
  • 65.5.4. Running the example
• 65.6. UART_9bit
  • 65.6.1. Overview
  • 65.6.2. Board Setting
  • 65.6.3. Running the example
• 65.7. UART tomagawa
  • 65.7.1. Overview
  • 65.7.2. Note
  • 65.7.3. Board Setting
  • 65.7.4. Running the example
• 65.8. uart_lin_master
  • 65.8.1. Overview
  • 65.8.2. Note
  • 65.8.3. Board Setting
  • 65.8.4. Running the example
• 65.9. uart_lin_slave
  • 65.9.1. Overview
  • 65.9.2. Note
  • 65.9.3. Board Setting
  • 65.9.4. Running the example
• 65.10. uart_lin_slave_baudrate_adaptive
  • 65.10.1. Overview
  • 65.10.2. Note
  • 65.10.3. Board Setting
  • 65.10.4. Running the example
• 65.11. UART_RXLINE_STATUS
  • 65.11.1. Overview
  • 65.11.2. Board Setting
  • 65.11.3. Notice
  • 65.11.4. Run steps
    • 65.11.4.1. overrun error test
    • 65.11.4.2. parity error test
    • 65.11.4.3. framing error test
    • 65.11.4.4. line break test