HPM SDK
HPMicro Software Development Kit
hpm_soc.h
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1 /*
2  * Copyright (c) 2021-2025 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_H
10 #define HPM_SOC_H
11 
12 
13 #include "hpm_soc_irq.h"
14 #include "hpm_common.h"
15 
16 #include "hpm_gpio_regs.h"
17 /* Address of GPIO instances */
18 /* FGPIO base address */
19 #define HPM_FGPIO_BASE (0x300000UL)
20 /* FGPIO base pointer */
21 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
22 /* GPIO0 base address */
23 #define HPM_GPIO0_BASE (0xF00D0000UL)
24 /* GPIO0 base pointer */
25 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
26 /* GPIO1 base address */
27 #define HPM_GPIO1_BASE (0xF00D4000UL)
28 /* GPIO1 base pointer */
29 #define HPM_GPIO1 ((GPIO_Type *) HPM_GPIO1_BASE)
30 /* PGPIO base address */
31 #define HPM_PGPIO_BASE (0xF411C000UL)
32 /* PGPIO base pointer */
33 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
34 
35 /* Address of DM instances */
36 /* DM base address */
37 #define HPM_DM_BASE (0x30000000UL)
38 
39 #include "hpm_plic_regs.h"
40 /* Address of PLIC instances */
41 /* PLIC base address */
42 #define HPM_PLIC_BASE (0xE4000000UL)
43 /* PLIC base pointer */
44 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
45 
46 #include "hpm_mchtmr_regs.h"
47 /* Address of MCHTMR instances */
48 /* MCHTMR base address */
49 #define HPM_MCHTMR_BASE (0xE6000000UL)
50 /* MCHTMR base pointer */
51 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
52 
53 #include "hpm_plic_sw_regs.h"
54 /* Address of PLICSW instances */
55 /* PLICSW base address */
56 #define HPM_PLICSW_BASE (0xE6400000UL)
57 /* PLICSW base pointer */
58 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
59 
60 #include "hpm_gptmr_regs.h"
61 /* Address of GPTMR instances */
62 /* GPTMR0 base address */
63 #define HPM_GPTMR0_BASE (0xF0000000UL)
64 /* GPTMR0 base pointer */
65 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
66 /* GPTMR1 base address */
67 #define HPM_GPTMR1_BASE (0xF0004000UL)
68 /* GPTMR1 base pointer */
69 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
70 /* GPTMR2 base address */
71 #define HPM_GPTMR2_BASE (0xF0008000UL)
72 /* GPTMR2 base pointer */
73 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
74 /* GPTMR3 base address */
75 #define HPM_GPTMR3_BASE (0xF000C000UL)
76 /* GPTMR3 base pointer */
77 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
78 /* NTMR0 base address */
79 #define HPM_NTMR0_BASE (0xF1410000UL)
80 /* NTMR0 base pointer */
81 #define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
82 /* PTMR base address */
83 #define HPM_PTMR_BASE (0xF4120000UL)
84 /* PTMR base pointer */
85 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
86 
87 #include "hpm_uart_regs.h"
88 /* Address of UART instances */
89 /* UART0 base address */
90 #define HPM_UART0_BASE (0xF0040000UL)
91 /* UART0 base pointer */
92 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
93 /* UART1 base address */
94 #define HPM_UART1_BASE (0xF0044000UL)
95 /* UART1 base pointer */
96 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
97 /* UART2 base address */
98 #define HPM_UART2_BASE (0xF0048000UL)
99 /* UART2 base pointer */
100 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
101 /* UART3 base address */
102 #define HPM_UART3_BASE (0xF004C000UL)
103 /* UART3 base pointer */
104 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
105 /* UART4 base address */
106 #define HPM_UART4_BASE (0xF0050000UL)
107 /* UART4 base pointer */
108 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
109 /* UART5 base address */
110 #define HPM_UART5_BASE (0xF0054000UL)
111 /* UART5 base pointer */
112 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
113 /* UART6 base address */
114 #define HPM_UART6_BASE (0xF0058000UL)
115 /* UART6 base pointer */
116 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
117 /* UART7 base address */
118 #define HPM_UART7_BASE (0xF005C000UL)
119 /* UART7 base pointer */
120 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
121 /* PUART base address */
122 #define HPM_PUART_BASE (0xF4124000UL)
123 /* PUART base pointer */
124 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
125 
126 #include "hpm_i2c_regs.h"
127 /* Address of I2C instances */
128 /* I2C0 base address */
129 #define HPM_I2C0_BASE (0xF0060000UL)
130 /* I2C0 base pointer */
131 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
132 /* I2C1 base address */
133 #define HPM_I2C1_BASE (0xF0064000UL)
134 /* I2C1 base pointer */
135 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
136 /* I2C2 base address */
137 #define HPM_I2C2_BASE (0xF0068000UL)
138 /* I2C2 base pointer */
139 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
140 /* I2C3 base address */
141 #define HPM_I2C3_BASE (0xF006C000UL)
142 /* I2C3 base pointer */
143 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
144 
145 #include "hpm_spi_regs.h"
146 /* Address of SPI instances */
147 /* SPI0 base address */
148 #define HPM_SPI0_BASE (0xF0070000UL)
149 /* SPI0 base pointer */
150 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
151 /* SPI1 base address */
152 #define HPM_SPI1_BASE (0xF0074000UL)
153 /* SPI1 base pointer */
154 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
155 /* SPI2 base address */
156 #define HPM_SPI2_BASE (0xF0078000UL)
157 /* SPI2 base pointer */
158 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
159 /* SPI3 base address */
160 #define HPM_SPI3_BASE (0xF007C000UL)
161 /* SPI3 base pointer */
162 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
163 
164 #include "hpm_crc_regs.h"
165 /* Address of CRC instances */
166 /* CRC base address */
167 #define HPM_CRC_BASE (0xF0080000UL)
168 /* CRC base pointer */
169 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
170 
171 #include "hpm_tsns_regs.h"
172 /* Address of TSNS instances */
173 /* TSNS base address */
174 #define HPM_TSNS_BASE (0xF0090000UL)
175 /* TSNS base pointer */
176 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
177 
178 #include "hpm_mbx_regs.h"
179 /* Address of MBX instances */
180 /* MBX0A base address */
181 #define HPM_MBX0A_BASE (0xF00A0000UL)
182 /* MBX0A base pointer */
183 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
184 /* MBX0B base address */
185 #define HPM_MBX0B_BASE (0xF00A4000UL)
186 /* MBX0B base pointer */
187 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
188 /* MBX1A base address */
189 #define HPM_MBX1A_BASE (0xF00A8000UL)
190 /* MBX1A base pointer */
191 #define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
192 /* MBX1B base address */
193 #define HPM_MBX1B_BASE (0xF00AC000UL)
194 /* MBX1B base pointer */
195 #define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
196 
197 #include "hpm_ewdg_regs.h"
198 /* Address of EWDG instances */
199 /* EWDG0 base address */
200 #define HPM_EWDG0_BASE (0xF00B0000UL)
201 /* EWDG0 base pointer */
202 #define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
203 /* EWDG1 base address */
204 #define HPM_EWDG1_BASE (0xF00B4000UL)
205 /* EWDG1 base pointer */
206 #define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
207 /* EWDG2 base address */
208 #define HPM_EWDG2_BASE (0xF00B8000UL)
209 /* EWDG2 base pointer */
210 #define HPM_EWDG2 ((EWDG_Type *) HPM_EWDG2_BASE)
211 /* EWDG3 base address */
212 #define HPM_EWDG3_BASE (0xF00BC000UL)
213 /* EWDG3 base pointer */
214 #define HPM_EWDG3 ((EWDG_Type *) HPM_EWDG3_BASE)
215 /* PEWDG base address */
216 #define HPM_PEWDG_BASE (0xF4128000UL)
217 /* PEWDG base pointer */
218 #define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
219 
220 #include "hpm_dmamux_regs.h"
221 /* Address of DMAMUX instances */
222 /* DMAMUX base address */
223 #define HPM_DMAMUX_BASE (0xF00C4000UL)
224 /* DMAMUX base pointer */
225 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
226 
227 #include "hpm_dmav2_regs.h"
228 /* Address of DMAV2 instances */
229 /* HDMA base address */
230 #define HPM_HDMA_BASE (0xF00C8000UL)
231 /* HDMA base pointer */
232 #define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
233 /* XDMA base address */
234 #define HPM_XDMA_BASE (0xF3100000UL)
235 /* XDMA base pointer */
236 #define HPM_XDMA ((DMAV2_Type *) HPM_XDMA_BASE)
237 
238 #include "hpm_ppi_regs.h"
239 /* Address of PPI instances */
240 /* PPI base address */
241 #define HPM_PPI_BASE (0xF00CC000UL)
242 /* PPI base pointer */
243 #define HPM_PPI ((PPI_Type *) HPM_PPI_BASE)
244 
245 #include "hpm_gpiom_regs.h"
246 /* Address of GPIOM instances */
247 /* GPIOM base address */
248 #define HPM_GPIOM_BASE (0xF00D8000UL)
249 /* GPIOM base pointer */
250 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
251 
252 #include "hpm_lobs_regs.h"
253 /* Address of LOBS instances */
254 /* LOBS base address */
255 #define HPM_LOBS_BASE (0xF00DC000UL)
256 /* LOBS base pointer */
257 #define HPM_LOBS ((LOBS_Type *) HPM_LOBS_BASE)
258 
259 #include "hpm_adc16_regs.h"
260 /* Address of ADC16 instances */
261 /* ADC0 base address */
262 #define HPM_ADC0_BASE (0xF0100000UL)
263 /* ADC0 base pointer */
264 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
265 /* ADC1 base address */
266 #define HPM_ADC1_BASE (0xF0104000UL)
267 /* ADC1 base pointer */
268 #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
269 /* ADC2 base address */
270 #define HPM_ADC2_BASE (0xF0108000UL)
271 /* ADC2 base pointer */
272 #define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE)
273 /* ADC3 base address */
274 #define HPM_ADC3_BASE (0xF010C000UL)
275 /* ADC3 base pointer */
276 #define HPM_ADC3 ((ADC16_Type *) HPM_ADC3_BASE)
277 
278 #include "hpm_dac_regs.h"
279 /* Address of DAC instances */
280 /* DAC0 base address */
281 #define HPM_DAC0_BASE (0xF0120000UL)
282 /* DAC0 base pointer */
283 #define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
284 /* DAC1 base address */
285 #define HPM_DAC1_BASE (0xF0124000UL)
286 /* DAC1 base pointer */
287 #define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
288 
289 #include "hpm_acmp_regs.h"
290 /* Address of ACMP instances */
291 /* ACMP0 base address */
292 #define HPM_ACMP0_BASE (0xF0130000UL)
293 /* ACMP0 base pointer */
294 #define HPM_ACMP0 ((ACMP_Type *) HPM_ACMP0_BASE)
295 /* ACMP1 base address */
296 #define HPM_ACMP1_BASE (0xF0134000UL)
297 /* ACMP1 base pointer */
298 #define HPM_ACMP1 ((ACMP_Type *) HPM_ACMP1_BASE)
299 /* ACMP2 base address */
300 #define HPM_ACMP2_BASE (0xF0138000UL)
301 /* ACMP2 base pointer */
302 #define HPM_ACMP2 ((ACMP_Type *) HPM_ACMP2_BASE)
303 /* ACMP3 base address */
304 #define HPM_ACMP3_BASE (0xF013C000UL)
305 /* ACMP3 base pointer */
306 #define HPM_ACMP3 ((ACMP_Type *) HPM_ACMP3_BASE)
307 
308 #include "hpm_i2s_regs.h"
309 /* Address of I2S instances */
310 /* I2S0 base address */
311 #define HPM_I2S0_BASE (0xF0140000UL)
312 /* I2S0 base pointer */
313 #define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
314 /* I2S1 base address */
315 #define HPM_I2S1_BASE (0xF0144000UL)
316 /* I2S1 base pointer */
317 #define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
318 
319 #include "hpm_dao_regs.h"
320 /* Address of DAO instances */
321 /* DAO base address */
322 #define HPM_DAO_BASE (0xF0150000UL)
323 /* DAO base pointer */
324 #define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
325 
326 #include "hpm_pdm_regs.h"
327 /* Address of PDM instances */
328 /* PDM base address */
329 #define HPM_PDM_BASE (0xF0154000UL)
330 /* PDM base pointer */
331 #define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
332 
333 #include "hpm_mcan_regs.h"
334 /* Address of MCAN instances */
335 /* MCAN0 base address */
336 #define HPM_MCAN0_BASE (0xF0300000UL)
337 /* MCAN0 base pointer */
338 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
339 /* MCAN1 base address */
340 #define HPM_MCAN1_BASE (0xF0304000UL)
341 /* MCAN1 base pointer */
342 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
343 /* MCAN2 base address */
344 #define HPM_MCAN2_BASE (0xF0308000UL)
345 /* MCAN2 base pointer */
346 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
347 /* MCAN3 base address */
348 #define HPM_MCAN3_BASE (0xF030C000UL)
349 /* MCAN3 base pointer */
350 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
351 
352 #include "hpm_ptpc_regs.h"
353 /* Address of PTPC instances */
354 /* PTPC base address */
355 #define HPM_PTPC_BASE (0xF037C000UL)
356 /* PTPC base pointer */
357 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
358 
359 #include "hpm_qeiv2_regs.h"
360 /* Address of QEIV2 instances */
361 /* QEI0 base address */
362 #define HPM_QEI0_BASE (0xF0400000UL)
363 /* QEI0 base pointer */
364 #define HPM_QEI0 ((QEIV2_Type *) HPM_QEI0_BASE)
365 /* QEI1 base address */
366 #define HPM_QEI1_BASE (0xF0404000UL)
367 /* QEI1 base pointer */
368 #define HPM_QEI1 ((QEIV2_Type *) HPM_QEI1_BASE)
369 
370 #include "hpm_qeov2_regs.h"
371 /* Address of QEOV2 instances */
372 /* QEO0 base address */
373 #define HPM_QEO0_BASE (0xF0410000UL)
374 /* QEO0 base pointer */
375 #define HPM_QEO0 ((QEOV2_Type *) HPM_QEO0_BASE)
376 /* QEO1 base address */
377 #define HPM_QEO1_BASE (0xF0414000UL)
378 /* QEO1 base pointer */
379 #define HPM_QEO1 ((QEOV2_Type *) HPM_QEO1_BASE)
380 
381 #include "hpm_pwmv2_regs.h"
382 /* Address of PWMV2 instances */
383 /* PWM0 base address */
384 #define HPM_PWM0_BASE (0xF0420000UL)
385 /* PWM0 base pointer */
386 #define HPM_PWM0 ((PWMV2_Type *) HPM_PWM0_BASE)
387 /* PWM1 base address */
388 #define HPM_PWM1_BASE (0xF0424000UL)
389 /* PWM1 base pointer */
390 #define HPM_PWM1 ((PWMV2_Type *) HPM_PWM1_BASE)
391 /* PWM2 base address */
392 #define HPM_PWM2_BASE (0xF0428000UL)
393 /* PWM2 base pointer */
394 #define HPM_PWM2 ((PWMV2_Type *) HPM_PWM2_BASE)
395 /* PWM3 base address */
396 #define HPM_PWM3_BASE (0xF042C000UL)
397 /* PWM3 base pointer */
398 #define HPM_PWM3 ((PWMV2_Type *) HPM_PWM3_BASE)
399 
400 #include "hpm_rdc_regs.h"
401 /* Address of RDC instances */
402 /* RDC0 base address */
403 #define HPM_RDC0_BASE (0xF0440000UL)
404 /* RDC0 base pointer */
405 #define HPM_RDC0 ((RDC_Type *) HPM_RDC0_BASE)
406 
407 #include "hpm_sdm_regs.h"
408 /* Address of SDM instances */
409 /* SDM0 base address */
410 #define HPM_SDM0_BASE (0xF0450000UL)
411 /* SDM0 base pointer */
412 #define HPM_SDM0 ((SDM_Type *) HPM_SDM0_BASE)
413 
414 #include "hpm_plb_regs.h"
415 /* Address of PLB instances */
416 /* PLB base address */
417 #define HPM_PLB_BASE (0xF0460000UL)
418 /* PLB base pointer */
419 #define HPM_PLB ((PLB_Type *) HPM_PLB_BASE)
420 
421 #include "hpm_synt_regs.h"
422 /* Address of SYNT instances */
423 /* SYNT base address */
424 #define HPM_SYNT_BASE (0xF0464000UL)
425 /* SYNT base pointer */
426 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
427 
428 #include "hpm_sei_regs.h"
429 /* Address of SEI instances */
430 /* SEI base address */
431 #define HPM_SEI_BASE (0xF0470000UL)
432 /* SEI base pointer */
433 #define HPM_SEI ((SEI_Type *) HPM_SEI_BASE)
434 
435 #include "hpm_trgm_regs.h"
436 /* Address of TRGM instances */
437 /* TRGM0 base address */
438 #define HPM_TRGM0_BASE (0xF047C000UL)
439 /* TRGM0 base pointer */
440 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
441 
442 #include "hpm_mtgv2_regs.h"
443 /* Address of MTGV2 instances */
444 /* MTG0 base address */
445 #define HPM_MTG0_BASE (0xF0490000UL)
446 /* MTG0 base pointer */
447 #define HPM_MTG0 ((MTGV2_Type *) HPM_MTG0_BASE)
448 
449 #include "hpm_vsc_regs.h"
450 /* Address of VSC instances */
451 /* VSC0 base address */
452 #define HPM_VSC0_BASE (0xF04A0000UL)
453 /* VSC0 base pointer */
454 #define HPM_VSC0 ((VSC_Type *) HPM_VSC0_BASE)
455 
456 #include "hpm_clc_regs.h"
457 /* Address of CLC instances */
458 /* CLC0 base address */
459 #define HPM_CLC0_BASE (0xF04B0000UL)
460 /* CLC0 base pointer */
461 #define HPM_CLC0 ((CLC_Type *) HPM_CLC0_BASE)
462 
463 #include "hpm_enet_regs.h"
464 /* Address of ENET instances */
465 /* ENET0 base address */
466 #define HPM_ENET0_BASE (0xF1400000UL)
467 /* ENET0 base pointer */
468 #define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
469 
470 #include "hpm_usb_regs.h"
471 /* Address of USB instances */
472 /* USB0 base address */
473 #define HPM_USB0_BASE (0xF1420000UL)
474 /* USB0 base pointer */
475 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
476 
477 #include "hpm_femc_regs.h"
478 /* Address of FEMC instances */
479 /* FEMC base address */
480 #define HPM_FEMC_BASE (0xF300C000UL)
481 /* FEMC base pointer */
482 #define HPM_FEMC ((FEMC_Type *) HPM_FEMC_BASE)
483 
484 #include "hpm_ffa_regs.h"
485 /* Address of FFA instances */
486 /* FFA base address */
487 #define HPM_FFA_BASE (0xF3108000UL)
488 /* FFA base pointer */
489 #define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
490 
491 #include "hpm_sdp_regs.h"
492 /* Address of SDP instances */
493 /* SDP base address */
494 #define HPM_SDP_BASE (0xF3140000UL)
495 /* SDP base pointer */
496 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
497 
498 #include "hpm_psec_regs.h"
499 /* Address of PSEC instances */
500 /* PSEC base address */
501 #define HPM_PSEC_BASE (0xF3144000UL)
502 /* PSEC base pointer */
503 #define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
504 
505 #include "hpm_pmon_regs.h"
506 /* Address of PMON instances */
507 /* PMON base address */
508 #define HPM_PMON_BASE (0xF3148000UL)
509 /* PMON base pointer */
510 #define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
511 
512 #include "hpm_rng_regs.h"
513 /* Address of RNG instances */
514 /* RNG base address */
515 #define HPM_RNG_BASE (0xF314C000UL)
516 /* RNG base pointer */
517 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
518 
519 #include "hpm_keym_regs.h"
520 /* Address of KEYM instances */
521 /* KEYM base address */
522 #define HPM_KEYM_BASE (0xF3154000UL)
523 /* KEYM base pointer */
524 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
525 
526 #include "hpm_otp_regs.h"
527 /* Address of OTP instances */
528 /* OTP base address */
529 #define HPM_OTP_BASE (0xF3158000UL)
530 /* OTP base pointer */
531 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
532 
533 #include "hpm_sysctl_regs.h"
534 /* Address of SYSCTL instances */
535 /* SYSCTL base address */
536 #define HPM_SYSCTL_BASE (0xF4000000UL)
537 /* SYSCTL base pointer */
538 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
539 
540 #include "hpm_ioc_regs.h"
541 /* Address of IOC instances */
542 /* IOC base address */
543 #define HPM_IOC_BASE (0xF4040000UL)
544 /* IOC base pointer */
545 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
546 /* PIOC base address */
547 #define HPM_PIOC_BASE (0xF4118000UL)
548 /* PIOC base pointer */
549 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
550 
551 #include "hpm_pllctlv2_regs.h"
552 /* Address of PLLCTLV2 instances */
553 /* PLLCTLV2 base address */
554 #define HPM_PLLCTLV2_BASE (0xF40C0000UL)
555 /* PLLCTLV2 base pointer */
556 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
557 
558 #include "hpm_ppor_regs.h"
559 /* Address of PPOR instances */
560 /* PPOR base address */
561 #define HPM_PPOR_BASE (0xF4100000UL)
562 /* PPOR base pointer */
563 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
564 
565 #include "hpm_pcfg_regs.h"
566 /* Address of PCFG instances */
567 /* PCFG base address */
568 #define HPM_PCFG_BASE (0xF4104000UL)
569 /* PCFG base pointer */
570 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
571 
572 #include "hpm_pdgo_regs.h"
573 /* Address of PDGO instances */
574 /* PDGO base address */
575 #define HPM_PDGO_BASE (0xF4134000UL)
576 /* PDGO base pointer */
577 #define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
578 
579 #include "hpm_pgpr_regs.h"
580 /* Address of PGPR instances */
581 /* PGPR0 base address */
582 #define HPM_PGPR0_BASE (0xF4138000UL)
583 /* PGPR0 base pointer */
584 #define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
585 /* PGPR1 base address */
586 #define HPM_PGPR1_BASE (0xF413C000UL)
587 /* PGPR1 base pointer */
588 #define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
589 
590 
591 #include "riscv/riscv_core.h"
592 #include "hpm_csr_regs.h"
593 #include "hpm_interrupt.h"
594 #include "hpm_misc.h"
595 #include "hpm_otp_table.h"
596 #include "hpm_dmamux_src.h"
597 #include "hpm_trgmmux_src.h"
598 #include "hpm_iomux.h"
599 #include "hpm_pmic_iomux.h"
600 #endif /* HPM_SOC_H */