HPM SDK
HPMicro Software Development Kit
hpm_soc.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2021-2025 HPMicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef HPM_SOC_H
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#define HPM_SOC_H
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#include "
hpm_soc_irq.h
"
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#include "
hpm_common.h
"
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#include "hpm_gpio_regs.h"
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/* Address of GPIO instances */
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/* FGPIO base address */
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#define HPM_FGPIO_BASE (0x300000UL)
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/* FGPIO base pointer */
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#define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
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/* GPIO0 base address */
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#define HPM_GPIO0_BASE (0xF00D0000UL)
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/* GPIO0 base pointer */
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#define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
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/* GPIO1 base address */
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#define HPM_GPIO1_BASE (0xF00D4000UL)
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/* GPIO1 base pointer */
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#define HPM_GPIO1 ((GPIO_Type *) HPM_GPIO1_BASE)
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/* PGPIO base address */
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#define HPM_PGPIO_BASE (0xF411C000UL)
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/* PGPIO base pointer */
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#define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
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/* Address of DM instances */
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/* DM base address */
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#define HPM_DM_BASE (0x30000000UL)
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#include "hpm_plic_regs.h"
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/* Address of PLIC instances */
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/* PLIC base address */
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#define HPM_PLIC_BASE (0xE4000000UL)
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/* PLIC base pointer */
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#define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
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#include "hpm_mchtmr_regs.h"
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/* Address of MCHTMR instances */
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/* MCHTMR base address */
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#define HPM_MCHTMR_BASE (0xE6000000UL)
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/* MCHTMR base pointer */
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#define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
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#include "hpm_plic_sw_regs.h"
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/* Address of PLICSW instances */
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/* PLICSW base address */
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#define HPM_PLICSW_BASE (0xE6400000UL)
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/* PLICSW base pointer */
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#define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
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#include "hpm_gptmr_regs.h"
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/* Address of GPTMR instances */
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/* GPTMR0 base address */
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#define HPM_GPTMR0_BASE (0xF0000000UL)
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/* GPTMR0 base pointer */
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#define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
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/* GPTMR1 base address */
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#define HPM_GPTMR1_BASE (0xF0004000UL)
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/* GPTMR1 base pointer */
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#define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
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/* GPTMR2 base address */
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#define HPM_GPTMR2_BASE (0xF0008000UL)
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/* GPTMR2 base pointer */
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#define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
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/* GPTMR3 base address */
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#define HPM_GPTMR3_BASE (0xF000C000UL)
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/* GPTMR3 base pointer */
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#define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
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/* NTMR0 base address */
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#define HPM_NTMR0_BASE (0xF1410000UL)
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/* NTMR0 base pointer */
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#define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
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/* PTMR base address */
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#define HPM_PTMR_BASE (0xF4120000UL)
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/* PTMR base pointer */
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#define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
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#include "hpm_uart_regs.h"
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/* Address of UART instances */
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/* UART0 base address */
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#define HPM_UART0_BASE (0xF0040000UL)
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/* UART0 base pointer */
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#define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
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/* UART1 base address */
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#define HPM_UART1_BASE (0xF0044000UL)
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/* UART1 base pointer */
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#define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
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/* UART2 base address */
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#define HPM_UART2_BASE (0xF0048000UL)
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/* UART2 base pointer */
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#define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
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/* UART3 base address */
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#define HPM_UART3_BASE (0xF004C000UL)
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/* UART3 base pointer */
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#define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
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/* UART4 base address */
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#define HPM_UART4_BASE (0xF0050000UL)
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/* UART4 base pointer */
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#define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
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/* UART5 base address */
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#define HPM_UART5_BASE (0xF0054000UL)
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/* UART5 base pointer */
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#define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
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/* UART6 base address */
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#define HPM_UART6_BASE (0xF0058000UL)
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/* UART6 base pointer */
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#define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
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/* UART7 base address */
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#define HPM_UART7_BASE (0xF005C000UL)
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/* UART7 base pointer */
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#define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
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/* PUART base address */
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#define HPM_PUART_BASE (0xF4124000UL)
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/* PUART base pointer */
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#define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
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#include "hpm_i2c_regs.h"
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/* Address of I2C instances */
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/* I2C0 base address */
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#define HPM_I2C0_BASE (0xF0060000UL)
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/* I2C0 base pointer */
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#define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
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/* I2C1 base address */
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#define HPM_I2C1_BASE (0xF0064000UL)
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/* I2C1 base pointer */
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#define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
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/* I2C2 base address */
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#define HPM_I2C2_BASE (0xF0068000UL)
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/* I2C2 base pointer */
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#define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
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/* I2C3 base address */
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#define HPM_I2C3_BASE (0xF006C000UL)
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/* I2C3 base pointer */
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#define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
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#include "hpm_spi_regs.h"
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/* Address of SPI instances */
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/* SPI0 base address */
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#define HPM_SPI0_BASE (0xF0070000UL)
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/* SPI0 base pointer */
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#define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
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/* SPI1 base address */
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#define HPM_SPI1_BASE (0xF0074000UL)
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/* SPI1 base pointer */
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#define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
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/* SPI2 base address */
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#define HPM_SPI2_BASE (0xF0078000UL)
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/* SPI2 base pointer */
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#define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
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/* SPI3 base address */
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#define HPM_SPI3_BASE (0xF007C000UL)
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/* SPI3 base pointer */
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#define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
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#include "hpm_crc_regs.h"
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/* Address of CRC instances */
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/* CRC base address */
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#define HPM_CRC_BASE (0xF0080000UL)
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/* CRC base pointer */
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#define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
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#include "hpm_tsns_regs.h"
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/* Address of TSNS instances */
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/* TSNS base address */
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#define HPM_TSNS_BASE (0xF0090000UL)
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/* TSNS base pointer */
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#define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
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#include "hpm_mbx_regs.h"
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/* Address of MBX instances */
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/* MBX0A base address */
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#define HPM_MBX0A_BASE (0xF00A0000UL)
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/* MBX0A base pointer */
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#define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
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/* MBX0B base address */
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#define HPM_MBX0B_BASE (0xF00A4000UL)
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/* MBX0B base pointer */
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#define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
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/* MBX1A base address */
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#define HPM_MBX1A_BASE (0xF00A8000UL)
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/* MBX1A base pointer */
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#define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
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/* MBX1B base address */
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#define HPM_MBX1B_BASE (0xF00AC000UL)
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/* MBX1B base pointer */
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#define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
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#include "hpm_ewdg_regs.h"
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/* Address of EWDG instances */
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/* EWDG0 base address */
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#define HPM_EWDG0_BASE (0xF00B0000UL)
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/* EWDG0 base pointer */
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#define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
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/* EWDG1 base address */
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#define HPM_EWDG1_BASE (0xF00B4000UL)
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/* EWDG1 base pointer */
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#define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
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/* EWDG2 base address */
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#define HPM_EWDG2_BASE (0xF00B8000UL)
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/* EWDG2 base pointer */
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#define HPM_EWDG2 ((EWDG_Type *) HPM_EWDG2_BASE)
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/* EWDG3 base address */
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#define HPM_EWDG3_BASE (0xF00BC000UL)
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/* EWDG3 base pointer */
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#define HPM_EWDG3 ((EWDG_Type *) HPM_EWDG3_BASE)
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/* PEWDG base address */
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#define HPM_PEWDG_BASE (0xF4128000UL)
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/* PEWDG base pointer */
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#define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
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#include "hpm_dmamux_regs.h"
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/* Address of DMAMUX instances */
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/* DMAMUX base address */
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#define HPM_DMAMUX_BASE (0xF00C4000UL)
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/* DMAMUX base pointer */
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#define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
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#include "hpm_dmav2_regs.h"
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/* Address of DMAV2 instances */
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/* HDMA base address */
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#define HPM_HDMA_BASE (0xF00C8000UL)
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/* HDMA base pointer */
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#define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
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/* XDMA base address */
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#define HPM_XDMA_BASE (0xF3100000UL)
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/* XDMA base pointer */
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#define HPM_XDMA ((DMAV2_Type *) HPM_XDMA_BASE)
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#include "hpm_ppi_regs.h"
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/* Address of PPI instances */
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/* PPI base address */
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#define HPM_PPI_BASE (0xF00CC000UL)
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/* PPI base pointer */
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#define HPM_PPI ((PPI_Type *) HPM_PPI_BASE)
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#include "hpm_gpiom_regs.h"
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/* Address of GPIOM instances */
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/* GPIOM base address */
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#define HPM_GPIOM_BASE (0xF00D8000UL)
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/* GPIOM base pointer */
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#define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
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#include "hpm_lobs_regs.h"
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/* Address of LOBS instances */
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/* LOBS base address */
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#define HPM_LOBS_BASE (0xF00DC000UL)
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/* LOBS base pointer */
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#define HPM_LOBS ((LOBS_Type *) HPM_LOBS_BASE)
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#include "hpm_adc16_regs.h"
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/* Address of ADC16 instances */
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/* ADC0 base address */
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#define HPM_ADC0_BASE (0xF0100000UL)
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/* ADC0 base pointer */
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#define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
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/* ADC1 base address */
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#define HPM_ADC1_BASE (0xF0104000UL)
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/* ADC1 base pointer */
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#define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
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/* ADC2 base address */
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#define HPM_ADC2_BASE (0xF0108000UL)
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/* ADC2 base pointer */
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#define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE)
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/* ADC3 base address */
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#define HPM_ADC3_BASE (0xF010C000UL)
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/* ADC3 base pointer */
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#define HPM_ADC3 ((ADC16_Type *) HPM_ADC3_BASE)
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#include "hpm_dac_regs.h"
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/* Address of DAC instances */
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/* DAC0 base address */
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#define HPM_DAC0_BASE (0xF0120000UL)
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/* DAC0 base pointer */
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#define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
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/* DAC1 base address */
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#define HPM_DAC1_BASE (0xF0124000UL)
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/* DAC1 base pointer */
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#define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
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#include "hpm_acmp_regs.h"
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/* Address of ACMP instances */
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/* ACMP0 base address */
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#define HPM_ACMP0_BASE (0xF0130000UL)
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/* ACMP0 base pointer */
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#define HPM_ACMP0 ((ACMP_Type *) HPM_ACMP0_BASE)
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/* ACMP1 base address */
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#define HPM_ACMP1_BASE (0xF0134000UL)
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/* ACMP1 base pointer */
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#define HPM_ACMP1 ((ACMP_Type *) HPM_ACMP1_BASE)
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/* ACMP2 base address */
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#define HPM_ACMP2_BASE (0xF0138000UL)
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/* ACMP2 base pointer */
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#define HPM_ACMP2 ((ACMP_Type *) HPM_ACMP2_BASE)
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/* ACMP3 base address */
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#define HPM_ACMP3_BASE (0xF013C000UL)
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/* ACMP3 base pointer */
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#define HPM_ACMP3 ((ACMP_Type *) HPM_ACMP3_BASE)
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#include "hpm_i2s_regs.h"
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/* Address of I2S instances */
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/* I2S0 base address */
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#define HPM_I2S0_BASE (0xF0140000UL)
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/* I2S0 base pointer */
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#define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
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/* I2S1 base address */
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#define HPM_I2S1_BASE (0xF0144000UL)
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/* I2S1 base pointer */
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#define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
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#include "hpm_dao_regs.h"
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/* Address of DAO instances */
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/* DAO base address */
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#define HPM_DAO_BASE (0xF0150000UL)
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/* DAO base pointer */
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#define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
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#include "hpm_pdm_regs.h"
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/* Address of PDM instances */
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/* PDM base address */
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#define HPM_PDM_BASE (0xF0154000UL)
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/* PDM base pointer */
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#define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
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#include "hpm_mcan_regs.h"
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/* Address of MCAN instances */
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/* MCAN0 base address */
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#define HPM_MCAN0_BASE (0xF0300000UL)
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/* MCAN0 base pointer */
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#define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
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/* MCAN1 base address */
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#define HPM_MCAN1_BASE (0xF0304000UL)
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/* MCAN1 base pointer */
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#define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
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/* MCAN2 base address */
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#define HPM_MCAN2_BASE (0xF0308000UL)
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/* MCAN2 base pointer */
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#define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
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/* MCAN3 base address */
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#define HPM_MCAN3_BASE (0xF030C000UL)
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/* MCAN3 base pointer */
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#define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
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#include "hpm_ptpc_regs.h"
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/* Address of PTPC instances */
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/* PTPC base address */
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#define HPM_PTPC_BASE (0xF037C000UL)
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/* PTPC base pointer */
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#define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
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#include "hpm_qeiv2_regs.h"
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/* Address of QEIV2 instances */
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/* QEI0 base address */
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#define HPM_QEI0_BASE (0xF0400000UL)
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/* QEI0 base pointer */
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#define HPM_QEI0 ((QEIV2_Type *) HPM_QEI0_BASE)
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/* QEI1 base address */
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#define HPM_QEI1_BASE (0xF0404000UL)
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/* QEI1 base pointer */
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#define HPM_QEI1 ((QEIV2_Type *) HPM_QEI1_BASE)
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#include "hpm_qeov2_regs.h"
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/* Address of QEOV2 instances */
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/* QEO0 base address */
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#define HPM_QEO0_BASE (0xF0410000UL)
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/* QEO0 base pointer */
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#define HPM_QEO0 ((QEOV2_Type *) HPM_QEO0_BASE)
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/* QEO1 base address */
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#define HPM_QEO1_BASE (0xF0414000UL)
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/* QEO1 base pointer */
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#define HPM_QEO1 ((QEOV2_Type *) HPM_QEO1_BASE)
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#include "hpm_pwmv2_regs.h"
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/* Address of PWMV2 instances */
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/* PWM0 base address */
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#define HPM_PWM0_BASE (0xF0420000UL)
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/* PWM0 base pointer */
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#define HPM_PWM0 ((PWMV2_Type *) HPM_PWM0_BASE)
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/* PWM1 base address */
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#define HPM_PWM1_BASE (0xF0424000UL)
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/* PWM1 base pointer */
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#define HPM_PWM1 ((PWMV2_Type *) HPM_PWM1_BASE)
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/* PWM2 base address */
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#define HPM_PWM2_BASE (0xF0428000UL)
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/* PWM2 base pointer */
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#define HPM_PWM2 ((PWMV2_Type *) HPM_PWM2_BASE)
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/* PWM3 base address */
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#define HPM_PWM3_BASE (0xF042C000UL)
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/* PWM3 base pointer */
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#define HPM_PWM3 ((PWMV2_Type *) HPM_PWM3_BASE)
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#include "hpm_rdc_regs.h"
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/* Address of RDC instances */
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/* RDC0 base address */
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#define HPM_RDC0_BASE (0xF0440000UL)
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/* RDC0 base pointer */
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#define HPM_RDC0 ((RDC_Type *) HPM_RDC0_BASE)
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#include "hpm_sdm_regs.h"
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/* Address of SDM instances */
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/* SDM0 base address */
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#define HPM_SDM0_BASE (0xF0450000UL)
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/* SDM0 base pointer */
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#define HPM_SDM0 ((SDM_Type *) HPM_SDM0_BASE)
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#include "hpm_plb_regs.h"
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/* Address of PLB instances */
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/* PLB base address */
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#define HPM_PLB_BASE (0xF0460000UL)
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/* PLB base pointer */
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#define HPM_PLB ((PLB_Type *) HPM_PLB_BASE)
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#include "hpm_synt_regs.h"
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/* Address of SYNT instances */
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/* SYNT base address */
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#define HPM_SYNT_BASE (0xF0464000UL)
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/* SYNT base pointer */
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#define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
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#include "hpm_sei_regs.h"
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/* Address of SEI instances */
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/* SEI base address */
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#define HPM_SEI_BASE (0xF0470000UL)
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/* SEI base pointer */
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#define HPM_SEI ((SEI_Type *) HPM_SEI_BASE)
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#include "hpm_trgm_regs.h"
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/* Address of TRGM instances */
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/* TRGM0 base address */
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#define HPM_TRGM0_BASE (0xF047C000UL)
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/* TRGM0 base pointer */
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#define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
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#include "
hpm_mtgv2_regs.h
"
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/* Address of MTGV2 instances */
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/* MTG0 base address */
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#define HPM_MTG0_BASE (0xF0490000UL)
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/* MTG0 base pointer */
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#define HPM_MTG0 ((MTGV2_Type *) HPM_MTG0_BASE)
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#include "hpm_vsc_regs.h"
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/* Address of VSC instances */
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/* VSC0 base address */
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#define HPM_VSC0_BASE (0xF04A0000UL)
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/* VSC0 base pointer */
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#define HPM_VSC0 ((VSC_Type *) HPM_VSC0_BASE)
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#include "hpm_clc_regs.h"
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/* Address of CLC instances */
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/* CLC0 base address */
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#define HPM_CLC0_BASE (0xF04B0000UL)
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/* CLC0 base pointer */
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#define HPM_CLC0 ((CLC_Type *) HPM_CLC0_BASE)
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#include "hpm_enet_regs.h"
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/* Address of ENET instances */
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/* ENET0 base address */
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#define HPM_ENET0_BASE (0xF1400000UL)
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/* ENET0 base pointer */
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#define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
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#include "hpm_usb_regs.h"
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/* Address of USB instances */
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/* USB0 base address */
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#define HPM_USB0_BASE (0xF1420000UL)
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/* USB0 base pointer */
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#define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
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#include "hpm_femc_regs.h"
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/* Address of FEMC instances */
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/* FEMC base address */
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#define HPM_FEMC_BASE (0xF300C000UL)
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/* FEMC base pointer */
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#define HPM_FEMC ((FEMC_Type *) HPM_FEMC_BASE)
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#include "hpm_ffa_regs.h"
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/* Address of FFA instances */
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/* FFA base address */
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#define HPM_FFA_BASE (0xF3108000UL)
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/* FFA base pointer */
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#define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
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#include "hpm_sdp_regs.h"
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/* Address of SDP instances */
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/* SDP base address */
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#define HPM_SDP_BASE (0xF3140000UL)
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/* SDP base pointer */
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#define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
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#include "hpm_psec_regs.h"
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/* Address of PSEC instances */
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/* PSEC base address */
501
#define HPM_PSEC_BASE (0xF3144000UL)
502
/* PSEC base pointer */
503
#define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
504
505
#include "hpm_pmon_regs.h"
506
/* Address of PMON instances */
507
/* PMON base address */
508
#define HPM_PMON_BASE (0xF3148000UL)
509
/* PMON base pointer */
510
#define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
511
512
#include "hpm_rng_regs.h"
513
/* Address of RNG instances */
514
/* RNG base address */
515
#define HPM_RNG_BASE (0xF314C000UL)
516
/* RNG base pointer */
517
#define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
518
519
#include "hpm_keym_regs.h"
520
/* Address of KEYM instances */
521
/* KEYM base address */
522
#define HPM_KEYM_BASE (0xF3154000UL)
523
/* KEYM base pointer */
524
#define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
525
526
#include "hpm_otp_regs.h"
527
/* Address of OTP instances */
528
/* OTP base address */
529
#define HPM_OTP_BASE (0xF3158000UL)
530
/* OTP base pointer */
531
#define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
532
533
#include "hpm_sysctl_regs.h"
534
/* Address of SYSCTL instances */
535
/* SYSCTL base address */
536
#define HPM_SYSCTL_BASE (0xF4000000UL)
537
/* SYSCTL base pointer */
538
#define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
539
540
#include "hpm_ioc_regs.h"
541
/* Address of IOC instances */
542
/* IOC base address */
543
#define HPM_IOC_BASE (0xF4040000UL)
544
/* IOC base pointer */
545
#define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
546
/* PIOC base address */
547
#define HPM_PIOC_BASE (0xF4118000UL)
548
/* PIOC base pointer */
549
#define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
550
551
#include "hpm_pllctlv2_regs.h"
552
/* Address of PLLCTLV2 instances */
553
/* PLLCTLV2 base address */
554
#define HPM_PLLCTLV2_BASE (0xF40C0000UL)
555
/* PLLCTLV2 base pointer */
556
#define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
557
558
#include "hpm_ppor_regs.h"
559
/* Address of PPOR instances */
560
/* PPOR base address */
561
#define HPM_PPOR_BASE (0xF4100000UL)
562
/* PPOR base pointer */
563
#define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
564
565
#include "hpm_pcfg_regs.h"
566
/* Address of PCFG instances */
567
/* PCFG base address */
568
#define HPM_PCFG_BASE (0xF4104000UL)
569
/* PCFG base pointer */
570
#define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
571
572
#include "hpm_pdgo_regs.h"
573
/* Address of PDGO instances */
574
/* PDGO base address */
575
#define HPM_PDGO_BASE (0xF4134000UL)
576
/* PDGO base pointer */
577
#define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
578
579
#include "hpm_pgpr_regs.h"
580
/* Address of PGPR instances */
581
/* PGPR0 base address */
582
#define HPM_PGPR0_BASE (0xF4138000UL)
583
/* PGPR0 base pointer */
584
#define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
585
/* PGPR1 base address */
586
#define HPM_PGPR1_BASE (0xF413C000UL)
587
/* PGPR1 base pointer */
588
#define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
589
590
591
#include "
riscv/riscv_core.h
"
592
#include "
hpm_csr_regs.h
"
593
#include "
hpm_interrupt.h
"
594
#include "
hpm_misc.h
"
595
#include "
hpm_otp_table.h
"
596
#include "
hpm_dmamux_src.h
"
597
#include "
hpm_trgmmux_src.h
"
598
#include "
hpm_iomux.h
"
599
#include "
hpm_pmic_iomux.h
"
600
#endif
/* HPM_SOC_H */
hpm_csr_regs.h
hpm_dmamux_src.h
hpm_interrupt.h
hpm_iomux.h
hpm_misc.h
hpm_otp_table.h
hpm_pmic_iomux.h
hpm_soc_irq.h
hpm_trgmmux_src.h
hpm_common.h
hpm_mtgv2_regs.h
riscv_core.h
soc
HPM6P00
HPM6P81
hpm_soc.h
Generated on Tue Apr 1 2025 05:30:26 for HPM SDK by
1.9.1