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Data Structures | |
| struct | SEI_Type |
| #define SEI_CMD_TABLE_0 (0UL) |
| #define SEI_CMD_TABLE_1 (1UL) |
| #define SEI_CMD_TABLE_2 (2UL) |
| #define SEI_CMD_TABLE_3 (3UL) |
| #define SEI_CMD_TABLE_4 (4UL) |
| #define SEI_CMD_TABLE_5 (5UL) |
| #define SEI_CMD_TABLE_6 (6UL) |
| #define SEI_CMD_TABLE_7 (7UL) |
| #define SEI_CTRL_0 (0UL) |
| #define SEI_CTRL_1 (1UL) |
| #define SEI_CTRL_10 (10UL) |
| #define SEI_CTRL_11 (11UL) |
| #define SEI_CTRL_12 (12UL) |
| #define SEI_CTRL_2 (2UL) |
| #define SEI_CTRL_3 (3UL) |
| #define SEI_CTRL_4 (4UL) |
| #define SEI_CTRL_5 (5UL) |
| #define SEI_CTRL_6 (6UL) |
| #define SEI_CTRL_7 (7UL) |
| #define SEI_CTRL_8 (8UL) |
| #define SEI_CTRL_9 (9UL) |
| #define SEI_CTRL_CMD_CLR_DATA_CLR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_CLR_DATA_CLR_MASK) >> SEI_CTRL_CMD_CLR_DATA_CLR_SHIFT) |
| #define SEI_CTRL_CMD_CLR_DATA_CLR_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_CLR_DATA_CLR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_CLR_DATA_CLR_SHIFT) & SEI_CTRL_CMD_CLR_DATA_CLR_MASK) |
| #define SEI_CTRL_CMD_CLR_DATA_CLR_SHIFT (0U) |
| #define SEI_CTRL_CMD_CMD_DATA_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_CMD_DATA_MASK) >> SEI_CTRL_CMD_CMD_DATA_SHIFT) |
| #define SEI_CTRL_CMD_CMD_DATA_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_CMD_DATA_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_CMD_DATA_SHIFT) & SEI_CTRL_CMD_CMD_DATA_MASK) |
| #define SEI_CTRL_CMD_CMD_DATA_SHIFT (0U) |
| #define SEI_CTRL_CMD_IDX_FIRST_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_IDX_FIRST_BIT_MASK) >> SEI_CTRL_CMD_IDX_FIRST_BIT_SHIFT) |
| #define SEI_CTRL_CMD_IDX_FIRST_BIT_MASK (0x1F0000UL) |
| #define SEI_CTRL_CMD_IDX_FIRST_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_IDX_FIRST_BIT_SHIFT) & SEI_CTRL_CMD_IDX_FIRST_BIT_MASK) |
| #define SEI_CTRL_CMD_IDX_FIRST_BIT_SHIFT (16U) |
| #define SEI_CTRL_CMD_IDX_LAST_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_IDX_LAST_BIT_MASK) >> SEI_CTRL_CMD_IDX_LAST_BIT_SHIFT) |
| #define SEI_CTRL_CMD_IDX_LAST_BIT_MASK (0x1F000000UL) |
| #define SEI_CTRL_CMD_IDX_LAST_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_IDX_LAST_BIT_SHIFT) & SEI_CTRL_CMD_IDX_LAST_BIT_MASK) |
| #define SEI_CTRL_CMD_IDX_LAST_BIT_SHIFT (24U) |
| #define SEI_CTRL_CMD_IDX_MAX_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_IDX_MAX_BIT_MASK) >> SEI_CTRL_CMD_IDX_MAX_BIT_SHIFT) |
| #define SEI_CTRL_CMD_IDX_MAX_BIT_MASK (0x1F00U) |
| #define SEI_CTRL_CMD_IDX_MAX_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_IDX_MAX_BIT_SHIFT) & SEI_CTRL_CMD_IDX_MAX_BIT_MASK) |
| #define SEI_CTRL_CMD_IDX_MAX_BIT_SHIFT (8U) |
| #define SEI_CTRL_CMD_IDX_MIN_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_IDX_MIN_BIT_MASK) >> SEI_CTRL_CMD_IDX_MIN_BIT_SHIFT) |
| #define SEI_CTRL_CMD_IDX_MIN_BIT_MASK (0x1FU) |
| #define SEI_CTRL_CMD_IDX_MIN_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_IDX_MIN_BIT_SHIFT) & SEI_CTRL_CMD_IDX_MIN_BIT_MASK) |
| #define SEI_CTRL_CMD_IDX_MIN_BIT_SHIFT (0U) |
| #define SEI_CTRL_CMD_IN_DATA_IN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_IN_DATA_IN_MASK) >> SEI_CTRL_CMD_IN_DATA_IN_SHIFT) |
| #define SEI_CTRL_CMD_IN_DATA_IN_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_IN_DATA_IN_SHIFT (0U) |
| #define SEI_CTRL_CMD_INV_DATA_TGL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_INV_DATA_TGL_MASK) >> SEI_CTRL_CMD_INV_DATA_TGL_SHIFT) |
| #define SEI_CTRL_CMD_INV_DATA_TGL_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_INV_DATA_TGL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_INV_DATA_TGL_SHIFT) & SEI_CTRL_CMD_INV_DATA_TGL_MASK) |
| #define SEI_CTRL_CMD_INV_DATA_TGL_SHIFT (0U) |
| #define SEI_CTRL_CMD_MODE_BORDER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_BORDER_MASK) >> SEI_CTRL_CMD_MODE_BORDER_SHIFT) |
| #define SEI_CTRL_CMD_MODE_BORDER_MASK (0x400U) |
| #define SEI_CTRL_CMD_MODE_BORDER_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_BORDER_SHIFT) & SEI_CTRL_CMD_MODE_BORDER_MASK) |
| #define SEI_CTRL_CMD_MODE_BORDER_SHIFT (10U) |
| #define SEI_CTRL_CMD_MODE_MODE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_MODE_MASK) >> SEI_CTRL_CMD_MODE_MODE_SHIFT) |
| #define SEI_CTRL_CMD_MODE_MODE_MASK (0x3U) |
| #define SEI_CTRL_CMD_MODE_MODE_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_MODE_SHIFT) & SEI_CTRL_CMD_MODE_MODE_MASK) |
| #define SEI_CTRL_CMD_MODE_MODE_SHIFT (0U) |
| #define SEI_CTRL_CMD_MODE_REWIND_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_REWIND_MASK) >> SEI_CTRL_CMD_MODE_REWIND_SHIFT) |
| #define SEI_CTRL_CMD_MODE_REWIND_MASK (0x100U) |
| #define SEI_CTRL_CMD_MODE_REWIND_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_REWIND_SHIFT) & SEI_CTRL_CMD_MODE_REWIND_MASK) |
| #define SEI_CTRL_CMD_MODE_REWIND_SHIFT (8U) |
| #define SEI_CTRL_CMD_MODE_SIGNED_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_SIGNED_MASK) >> SEI_CTRL_CMD_MODE_SIGNED_SHIFT) |
| #define SEI_CTRL_CMD_MODE_SIGNED_MASK (0x200U) |
| #define SEI_CTRL_CMD_MODE_SIGNED_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_SIGNED_SHIFT) & SEI_CTRL_CMD_MODE_SIGNED_MASK) |
| #define SEI_CTRL_CMD_MODE_SIGNED_SHIFT (9U) |
| #define SEI_CTRL_CMD_MODE_WLEN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_WLEN_MASK) >> SEI_CTRL_CMD_MODE_WLEN_SHIFT) |
| #define SEI_CTRL_CMD_MODE_WLEN_MASK (0x1F0000UL) |
| #define SEI_CTRL_CMD_MODE_WLEN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_WLEN_SHIFT) & SEI_CTRL_CMD_MODE_WLEN_MASK) |
| #define SEI_CTRL_CMD_MODE_WLEN_SHIFT (16U) |
| #define SEI_CTRL_CMD_MODE_WORDER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_MODE_WORDER_MASK) >> SEI_CTRL_CMD_MODE_WORDER_SHIFT) |
| #define SEI_CTRL_CMD_MODE_WORDER_MASK (0x800U) |
| #define SEI_CTRL_CMD_MODE_WORDER_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_MODE_WORDER_SHIFT) & SEI_CTRL_CMD_MODE_WORDER_MASK) |
| #define SEI_CTRL_CMD_MODE_WORDER_SHIFT (11U) |
| #define SEI_CTRL_CMD_OUT_DATA_OUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_OUT_DATA_OUT_MASK) >> SEI_CTRL_CMD_OUT_DATA_OUT_SHIFT) |
| #define SEI_CTRL_CMD_OUT_DATA_OUT_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_OUT_DATA_OUT_SHIFT (0U) |
| #define SEI_CTRL_CMD_SET_DATA_SET_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_SET_DATA_SET_MASK) >> SEI_CTRL_CMD_SET_DATA_SET_SHIFT) |
| #define SEI_CTRL_CMD_SET_DATA_SET_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_SET_DATA_SET_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_SET_DATA_SET_SHIFT) & SEI_CTRL_CMD_SET_DATA_SET_MASK) |
| #define SEI_CTRL_CMD_SET_DATA_SET_SHIFT (0U) |
| #define SEI_CTRL_CMD_STS_BIT_IDX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_STS_BIT_IDX_MASK) >> SEI_CTRL_CMD_STS_BIT_IDX_SHIFT) |
| #define SEI_CTRL_CMD_STS_BIT_IDX_MASK (0x1FU) |
| #define SEI_CTRL_CMD_STS_BIT_IDX_SHIFT (0U) |
| #define SEI_CTRL_CMD_STS_WORD_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_STS_WORD_CNT_MASK) >> SEI_CTRL_CMD_STS_WORD_CNT_SHIFT) |
| #define SEI_CTRL_CMD_STS_WORD_CNT_MASK (0x1F00U) |
| #define SEI_CTRL_CMD_STS_WORD_CNT_SHIFT (8U) |
| #define SEI_CTRL_CMD_STS_WORD_IDX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_STS_WORD_IDX_MASK) >> SEI_CTRL_CMD_STS_WORD_IDX_SHIFT) |
| #define SEI_CTRL_CMD_STS_WORD_IDX_MASK (0x1F0000UL) |
| #define SEI_CTRL_CMD_STS_WORD_IDX_SHIFT (16U) |
| #define SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_MASK) >> SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_SHIFT) & SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_MASK) |
| #define SEI_CTRL_CMD_TABLE_MAX_CMD_MAX_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_MASK) >> SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_SHIFT) & SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_MASK) |
| #define SEI_CTRL_CMD_TABLE_MIN_CMD_MIN_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_MASK) >> SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_SHIFT) & SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_MASK) |
| #define SEI_CTRL_CMD_TABLE_MSK_CMD_MASK_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTA_PTR0_MASK) >> SEI_CTRL_CMD_TABLE_PTA_PTR0_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR0_MASK (0xFFU) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTA_PTR0_SHIFT) & SEI_CTRL_CMD_TABLE_PTA_PTR0_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR0_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTA_PTR1_MASK) >> SEI_CTRL_CMD_TABLE_PTA_PTR1_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR1_MASK (0xFF00U) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTA_PTR1_SHIFT) & SEI_CTRL_CMD_TABLE_PTA_PTR1_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR1_SHIFT (8U) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTA_PTR2_MASK) >> SEI_CTRL_CMD_TABLE_PTA_PTR2_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR2_MASK (0xFF0000UL) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTA_PTR2_SHIFT) & SEI_CTRL_CMD_TABLE_PTA_PTR2_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR2_SHIFT (16U) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTA_PTR3_MASK) >> SEI_CTRL_CMD_TABLE_PTA_PTR3_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR3_MASK (0xFF000000UL) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTA_PTR3_SHIFT) & SEI_CTRL_CMD_TABLE_PTA_PTR3_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTA_PTR3_SHIFT (24U) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR4_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTB_PTR4_MASK) >> SEI_CTRL_CMD_TABLE_PTB_PTR4_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR4_MASK (0xFFU) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR4_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTB_PTR4_SHIFT) & SEI_CTRL_CMD_TABLE_PTB_PTR4_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR4_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR5_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTB_PTR5_MASK) >> SEI_CTRL_CMD_TABLE_PTB_PTR5_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR5_MASK (0xFF00U) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR5_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTB_PTR5_SHIFT) & SEI_CTRL_CMD_TABLE_PTB_PTR5_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR5_SHIFT (8U) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR6_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTB_PTR6_MASK) >> SEI_CTRL_CMD_TABLE_PTB_PTR6_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR6_MASK (0xFF0000UL) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR6_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTB_PTR6_SHIFT) & SEI_CTRL_CMD_TABLE_PTB_PTR6_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR6_SHIFT (16U) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR7_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTB_PTR7_MASK) >> SEI_CTRL_CMD_TABLE_PTB_PTR7_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR7_MASK (0xFF000000UL) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR7_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTB_PTR7_SHIFT) & SEI_CTRL_CMD_TABLE_PTB_PTR7_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTB_PTR7_SHIFT (24U) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR10_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTC_PTR10_MASK) >> SEI_CTRL_CMD_TABLE_PTC_PTR10_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR10_MASK (0xFF0000UL) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR10_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTC_PTR10_SHIFT) & SEI_CTRL_CMD_TABLE_PTC_PTR10_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR10_SHIFT (16U) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR11_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTC_PTR11_MASK) >> SEI_CTRL_CMD_TABLE_PTC_PTR11_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR11_MASK (0xFF000000UL) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR11_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTC_PTR11_SHIFT) & SEI_CTRL_CMD_TABLE_PTC_PTR11_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR11_SHIFT (24U) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR8_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTC_PTR8_MASK) >> SEI_CTRL_CMD_TABLE_PTC_PTR8_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR8_MASK (0xFFU) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR8_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTC_PTR8_SHIFT) & SEI_CTRL_CMD_TABLE_PTC_PTR8_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR8_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR9_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTC_PTR9_MASK) >> SEI_CTRL_CMD_TABLE_PTC_PTR9_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR9_MASK (0xFF00U) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR9_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTC_PTR9_SHIFT) & SEI_CTRL_CMD_TABLE_PTC_PTR9_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTC_PTR9_SHIFT (8U) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR12_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTD_PTR12_MASK) >> SEI_CTRL_CMD_TABLE_PTD_PTR12_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR12_MASK (0xFFU) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR12_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTD_PTR12_SHIFT) & SEI_CTRL_CMD_TABLE_PTD_PTR12_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR12_SHIFT (0U) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR13_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTD_PTR13_MASK) >> SEI_CTRL_CMD_TABLE_PTD_PTR13_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR13_MASK (0xFF00U) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR13_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTD_PTR13_SHIFT) & SEI_CTRL_CMD_TABLE_PTD_PTR13_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR13_SHIFT (8U) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR14_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTD_PTR14_MASK) >> SEI_CTRL_CMD_TABLE_PTD_PTR14_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR14_MASK (0xFF0000UL) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR14_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTD_PTR14_SHIFT) & SEI_CTRL_CMD_TABLE_PTD_PTR14_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR14_SHIFT (16U) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR15_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_CMD_TABLE_PTD_PTR15_MASK) >> SEI_CTRL_CMD_TABLE_PTD_PTR15_SHIFT) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR15_MASK (0xFF000000UL) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR15_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_CMD_TABLE_PTD_PTR15_SHIFT) & SEI_CTRL_CMD_TABLE_PTD_PTR15_MASK) |
| #define SEI_CTRL_CMD_TABLE_PTD_PTR15_SHIFT (24U) |
| #define SEI_CTRL_DMA_EN_EXCEPT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_EXCEPT_MASK) >> SEI_CTRL_DMA_EN_EXCEPT_SHIFT) |
| #define SEI_CTRL_DMA_EN_EXCEPT_MASK (0x2U) |
| #define SEI_CTRL_DMA_EN_EXCEPT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_EXCEPT_SHIFT) & SEI_CTRL_DMA_EN_EXCEPT_MASK) |
| #define SEI_CTRL_DMA_EN_EXCEPT_SHIFT (1U) |
| #define SEI_CTRL_DMA_EN_INSTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_INSTR0_END_MASK) >> SEI_CTRL_DMA_EN_INSTR0_END_SHIFT) |
| #define SEI_CTRL_DMA_EN_INSTR0_END_MASK (0x400U) |
| #define SEI_CTRL_DMA_EN_INSTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_INSTR0_END_SHIFT) & SEI_CTRL_DMA_EN_INSTR0_END_MASK) |
| #define SEI_CTRL_DMA_EN_INSTR0_END_SHIFT (10U) |
| #define SEI_CTRL_DMA_EN_INSTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_INSTR0_ST_MASK) >> SEI_CTRL_DMA_EN_INSTR0_ST_SHIFT) |
| #define SEI_CTRL_DMA_EN_INSTR0_ST_MASK (0x40U) |
| #define SEI_CTRL_DMA_EN_INSTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_INSTR0_ST_SHIFT) & SEI_CTRL_DMA_EN_INSTR0_ST_MASK) |
| #define SEI_CTRL_DMA_EN_INSTR0_ST_SHIFT (6U) |
| #define SEI_CTRL_DMA_EN_INSTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_INSTR1_END_MASK) >> SEI_CTRL_DMA_EN_INSTR1_END_SHIFT) |
| #define SEI_CTRL_DMA_EN_INSTR1_END_MASK (0x800U) |
| #define SEI_CTRL_DMA_EN_INSTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_INSTR1_END_SHIFT) & SEI_CTRL_DMA_EN_INSTR1_END_MASK) |
| #define SEI_CTRL_DMA_EN_INSTR1_END_SHIFT (11U) |
| #define SEI_CTRL_DMA_EN_INSTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_INSTR1_ST_MASK) >> SEI_CTRL_DMA_EN_INSTR1_ST_SHIFT) |
| #define SEI_CTRL_DMA_EN_INSTR1_ST_MASK (0x80U) |
| #define SEI_CTRL_DMA_EN_INSTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_INSTR1_ST_SHIFT) & SEI_CTRL_DMA_EN_INSTR1_ST_MASK) |
| #define SEI_CTRL_DMA_EN_INSTR1_ST_SHIFT (7U) |
| #define SEI_CTRL_DMA_EN_LATCH0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_LATCH0_MASK) >> SEI_CTRL_DMA_EN_LATCH0_SHIFT) |
| #define SEI_CTRL_DMA_EN_LATCH0_MASK (0x10000UL) |
| #define SEI_CTRL_DMA_EN_LATCH0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_LATCH0_SHIFT) & SEI_CTRL_DMA_EN_LATCH0_MASK) |
| #define SEI_CTRL_DMA_EN_LATCH0_SHIFT (16U) |
| #define SEI_CTRL_DMA_EN_LATCH1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_LATCH1_MASK) >> SEI_CTRL_DMA_EN_LATCH1_SHIFT) |
| #define SEI_CTRL_DMA_EN_LATCH1_MASK (0x20000UL) |
| #define SEI_CTRL_DMA_EN_LATCH1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_LATCH1_SHIFT) & SEI_CTRL_DMA_EN_LATCH1_MASK) |
| #define SEI_CTRL_DMA_EN_LATCH1_SHIFT (17U) |
| #define SEI_CTRL_DMA_EN_LATCH2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_LATCH2_MASK) >> SEI_CTRL_DMA_EN_LATCH2_SHIFT) |
| #define SEI_CTRL_DMA_EN_LATCH2_MASK (0x40000UL) |
| #define SEI_CTRL_DMA_EN_LATCH2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_LATCH2_SHIFT) & SEI_CTRL_DMA_EN_LATCH2_MASK) |
| #define SEI_CTRL_DMA_EN_LATCH2_SHIFT (18U) |
| #define SEI_CTRL_DMA_EN_LATCH3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_LATCH3_MASK) >> SEI_CTRL_DMA_EN_LATCH3_SHIFT) |
| #define SEI_CTRL_DMA_EN_LATCH3_MASK (0x80000UL) |
| #define SEI_CTRL_DMA_EN_LATCH3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_LATCH3_SHIFT) & SEI_CTRL_DMA_EN_LATCH3_MASK) |
| #define SEI_CTRL_DMA_EN_LATCH3_SHIFT (19U) |
| #define SEI_CTRL_DMA_EN_PTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_PTR0_END_MASK) >> SEI_CTRL_DMA_EN_PTR0_END_SHIFT) |
| #define SEI_CTRL_DMA_EN_PTR0_END_MASK (0x100U) |
| #define SEI_CTRL_DMA_EN_PTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_PTR0_END_SHIFT) & SEI_CTRL_DMA_EN_PTR0_END_MASK) |
| #define SEI_CTRL_DMA_EN_PTR0_END_SHIFT (8U) |
| #define SEI_CTRL_DMA_EN_PTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_PTR0_ST_MASK) >> SEI_CTRL_DMA_EN_PTR0_ST_SHIFT) |
| #define SEI_CTRL_DMA_EN_PTR0_ST_MASK (0x10U) |
| #define SEI_CTRL_DMA_EN_PTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_PTR0_ST_SHIFT) & SEI_CTRL_DMA_EN_PTR0_ST_MASK) |
| #define SEI_CTRL_DMA_EN_PTR0_ST_SHIFT (4U) |
| #define SEI_CTRL_DMA_EN_PTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_PTR1_END_MASK) >> SEI_CTRL_DMA_EN_PTR1_END_SHIFT) |
| #define SEI_CTRL_DMA_EN_PTR1_END_MASK (0x200U) |
| #define SEI_CTRL_DMA_EN_PTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_PTR1_END_SHIFT) & SEI_CTRL_DMA_EN_PTR1_END_MASK) |
| #define SEI_CTRL_DMA_EN_PTR1_END_SHIFT (9U) |
| #define SEI_CTRL_DMA_EN_PTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_PTR1_ST_MASK) >> SEI_CTRL_DMA_EN_PTR1_ST_SHIFT) |
| #define SEI_CTRL_DMA_EN_PTR1_ST_MASK (0x20U) |
| #define SEI_CTRL_DMA_EN_PTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_PTR1_ST_SHIFT) & SEI_CTRL_DMA_EN_PTR1_ST_MASK) |
| #define SEI_CTRL_DMA_EN_PTR1_ST_SHIFT (5U) |
| #define SEI_CTRL_DMA_EN_SMP_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_SMP_ERR_MASK) >> SEI_CTRL_DMA_EN_SMP_ERR_SHIFT) |
| #define SEI_CTRL_DMA_EN_SMP_ERR_MASK (0x100000UL) |
| #define SEI_CTRL_DMA_EN_SMP_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_SMP_ERR_SHIFT) & SEI_CTRL_DMA_EN_SMP_ERR_MASK) |
| #define SEI_CTRL_DMA_EN_SMP_ERR_SHIFT (20U) |
| #define SEI_CTRL_DMA_EN_STALL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_STALL_MASK) >> SEI_CTRL_DMA_EN_STALL_SHIFT) |
| #define SEI_CTRL_DMA_EN_STALL_MASK (0x1U) |
| #define SEI_CTRL_DMA_EN_STALL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_STALL_SHIFT) & SEI_CTRL_DMA_EN_STALL_MASK) |
| #define SEI_CTRL_DMA_EN_STALL_SHIFT (0U) |
| #define SEI_CTRL_DMA_EN_TIMEOUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TIMEOUT_MASK) >> SEI_CTRL_DMA_EN_TIMEOUT_SHIFT) |
| #define SEI_CTRL_DMA_EN_TIMEOUT_MASK (0x2000U) |
| #define SEI_CTRL_DMA_EN_TIMEOUT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TIMEOUT_SHIFT) & SEI_CTRL_DMA_EN_TIMEOUT_MASK) |
| #define SEI_CTRL_DMA_EN_TIMEOUT_SHIFT (13U) |
| #define SEI_CTRL_DMA_EN_TRG_ERR0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRG_ERR0_MASK) >> SEI_CTRL_DMA_EN_TRG_ERR0_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRG_ERR0_MASK (0x10000000UL) |
| #define SEI_CTRL_DMA_EN_TRG_ERR0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRG_ERR0_SHIFT) & SEI_CTRL_DMA_EN_TRG_ERR0_MASK) |
| #define SEI_CTRL_DMA_EN_TRG_ERR0_SHIFT (28U) |
| #define SEI_CTRL_DMA_EN_TRG_ERR1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRG_ERR1_MASK) >> SEI_CTRL_DMA_EN_TRG_ERR1_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRG_ERR1_MASK (0x20000000UL) |
| #define SEI_CTRL_DMA_EN_TRG_ERR1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRG_ERR1_SHIFT) & SEI_CTRL_DMA_EN_TRG_ERR1_MASK) |
| #define SEI_CTRL_DMA_EN_TRG_ERR1_SHIFT (29U) |
| #define SEI_CTRL_DMA_EN_TRG_ERR2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRG_ERR2_MASK) >> SEI_CTRL_DMA_EN_TRG_ERR2_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRG_ERR2_MASK (0x40000000UL) |
| #define SEI_CTRL_DMA_EN_TRG_ERR2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRG_ERR2_SHIFT) & SEI_CTRL_DMA_EN_TRG_ERR2_MASK) |
| #define SEI_CTRL_DMA_EN_TRG_ERR2_SHIFT (30U) |
| #define SEI_CTRL_DMA_EN_TRG_ERR3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRG_ERR3_MASK) >> SEI_CTRL_DMA_EN_TRG_ERR3_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRG_ERR3_MASK (0x80000000UL) |
| #define SEI_CTRL_DMA_EN_TRG_ERR3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRG_ERR3_SHIFT) & SEI_CTRL_DMA_EN_TRG_ERR3_MASK) |
| #define SEI_CTRL_DMA_EN_TRG_ERR3_SHIFT (31U) |
| #define SEI_CTRL_DMA_EN_TRIGER0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRIGER0_MASK) >> SEI_CTRL_DMA_EN_TRIGER0_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRIGER0_MASK (0x1000000UL) |
| #define SEI_CTRL_DMA_EN_TRIGER0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRIGER0_SHIFT) & SEI_CTRL_DMA_EN_TRIGER0_MASK) |
| #define SEI_CTRL_DMA_EN_TRIGER0_SHIFT (24U) |
| #define SEI_CTRL_DMA_EN_TRIGER1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRIGER1_MASK) >> SEI_CTRL_DMA_EN_TRIGER1_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRIGER1_MASK (0x2000000UL) |
| #define SEI_CTRL_DMA_EN_TRIGER1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRIGER1_SHIFT) & SEI_CTRL_DMA_EN_TRIGER1_MASK) |
| #define SEI_CTRL_DMA_EN_TRIGER1_SHIFT (25U) |
| #define SEI_CTRL_DMA_EN_TRIGER2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRIGER2_MASK) >> SEI_CTRL_DMA_EN_TRIGER2_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRIGER2_MASK (0x4000000UL) |
| #define SEI_CTRL_DMA_EN_TRIGER2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRIGER2_SHIFT) & SEI_CTRL_DMA_EN_TRIGER2_MASK) |
| #define SEI_CTRL_DMA_EN_TRIGER2_SHIFT (26U) |
| #define SEI_CTRL_DMA_EN_TRIGER3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRIGER3_MASK) >> SEI_CTRL_DMA_EN_TRIGER3_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRIGER3_MASK (0x8000000UL) |
| #define SEI_CTRL_DMA_EN_TRIGER3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRIGER3_SHIFT) & SEI_CTRL_DMA_EN_TRIGER3_MASK) |
| #define SEI_CTRL_DMA_EN_TRIGER3_SHIFT (27U) |
| #define SEI_CTRL_DMA_EN_TRX_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_TRX_ERR_MASK) >> SEI_CTRL_DMA_EN_TRX_ERR_SHIFT) |
| #define SEI_CTRL_DMA_EN_TRX_ERR_MASK (0x1000U) |
| #define SEI_CTRL_DMA_EN_TRX_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_TRX_ERR_SHIFT) & SEI_CTRL_DMA_EN_TRX_ERR_MASK) |
| #define SEI_CTRL_DMA_EN_TRX_ERR_SHIFT (12U) |
| #define SEI_CTRL_DMA_EN_WDOG_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_DMA_EN_WDOG_MASK) >> SEI_CTRL_DMA_EN_WDOG_SHIFT) |
| #define SEI_CTRL_DMA_EN_WDOG_MASK (0x4U) |
| #define SEI_CTRL_DMA_EN_WDOG_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_DMA_EN_WDOG_SHIFT) & SEI_CTRL_DMA_EN_WDOG_MASK) |
| #define SEI_CTRL_DMA_EN_WDOG_SHIFT (2U) |
| #define SEI_CTRL_ENGINE_CTRL_ARMING_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_CTRL_ARMING_MASK) >> SEI_CTRL_ENGINE_CTRL_ARMING_SHIFT) |
| #define SEI_CTRL_ENGINE_CTRL_ARMING_MASK (0x10000UL) |
| #define SEI_CTRL_ENGINE_CTRL_ARMING_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_CTRL_ARMING_SHIFT) & SEI_CTRL_ENGINE_CTRL_ARMING_MASK) |
| #define SEI_CTRL_ENGINE_CTRL_ARMING_SHIFT (16U) |
| #define SEI_CTRL_ENGINE_CTRL_ENABLE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_CTRL_ENABLE_MASK) >> SEI_CTRL_ENGINE_CTRL_ENABLE_SHIFT) |
| #define SEI_CTRL_ENGINE_CTRL_ENABLE_MASK (0x1U) |
| #define SEI_CTRL_ENGINE_CTRL_ENABLE_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_CTRL_ENABLE_SHIFT) & SEI_CTRL_ENGINE_CTRL_ENABLE_MASK) |
| #define SEI_CTRL_ENGINE_CTRL_ENABLE_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_CTRL_EXCEPT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_CTRL_EXCEPT_MASK) >> SEI_CTRL_ENGINE_CTRL_EXCEPT_SHIFT) |
| #define SEI_CTRL_ENGINE_CTRL_EXCEPT_MASK (0x100U) |
| #define SEI_CTRL_ENGINE_CTRL_EXCEPT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_CTRL_EXCEPT_SHIFT) & SEI_CTRL_ENGINE_CTRL_EXCEPT_MASK) |
| #define SEI_CTRL_ENGINE_CTRL_EXCEPT_SHIFT (8U) |
| #define SEI_CTRL_ENGINE_CTRL_REWIND_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_CTRL_REWIND_MASK) >> SEI_CTRL_ENGINE_CTRL_REWIND_SHIFT) |
| #define SEI_CTRL_ENGINE_CTRL_REWIND_MASK (0x10U) |
| #define SEI_CTRL_ENGINE_CTRL_REWIND_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_CTRL_REWIND_SHIFT) & SEI_CTRL_ENGINE_CTRL_REWIND_MASK) |
| #define SEI_CTRL_ENGINE_CTRL_REWIND_SHIFT (4U) |
| #define SEI_CTRL_ENGINE_CTRL_WATCH_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_CTRL_WATCH_MASK) >> SEI_CTRL_ENGINE_CTRL_WATCH_SHIFT) |
| #define SEI_CTRL_ENGINE_CTRL_WATCH_MASK (0x1000000UL) |
| #define SEI_CTRL_ENGINE_CTRL_WATCH_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_CTRL_WATCH_SHIFT) & SEI_CTRL_ENGINE_CTRL_WATCH_MASK) |
| #define SEI_CTRL_ENGINE_CTRL_WATCH_SHIFT (24U) |
| #define SEI_CTRL_ENGINE_EXE_INST_INST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_INST_INST_MASK) >> SEI_CTRL_ENGINE_EXE_INST_INST_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_INST_INST_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_ENGINE_EXE_INST_INST_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_EXE_PTR_BIT_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_PTR_BIT_CNT_MASK) >> SEI_CTRL_ENGINE_EXE_PTR_BIT_CNT_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_PTR_BIT_CNT_MASK (0x1F0000UL) |
| #define SEI_CTRL_ENGINE_EXE_PTR_BIT_CNT_SHIFT (16U) |
| #define SEI_CTRL_ENGINE_EXE_PTR_HALT_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_PTR_HALT_CNT_MASK) >> SEI_CTRL_ENGINE_EXE_PTR_HALT_CNT_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_PTR_HALT_CNT_MASK (0x1F000000UL) |
| #define SEI_CTRL_ENGINE_EXE_PTR_HALT_CNT_SHIFT (24U) |
| #define SEI_CTRL_ENGINE_EXE_PTR_POINTER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_PTR_POINTER_MASK) >> SEI_CTRL_ENGINE_EXE_PTR_POINTER_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_PTR_POINTER_MASK (0xFFU) |
| #define SEI_CTRL_ENGINE_EXE_PTR_POINTER_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_EXE_STA_ARMED_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_STA_ARMED_MASK) >> SEI_CTRL_ENGINE_EXE_STA_ARMED_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_STA_ARMED_MASK (0x10000UL) |
| #define SEI_CTRL_ENGINE_EXE_STA_ARMED_SHIFT (16U) |
| #define SEI_CTRL_ENGINE_EXE_STA_EXPIRE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_STA_EXPIRE_MASK) >> SEI_CTRL_ENGINE_EXE_STA_EXPIRE_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_STA_EXPIRE_MASK (0x100U) |
| #define SEI_CTRL_ENGINE_EXE_STA_EXPIRE_SHIFT (8U) |
| #define SEI_CTRL_ENGINE_EXE_STA_STALL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_STA_STALL_MASK) >> SEI_CTRL_ENGINE_EXE_STA_STALL_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_STA_STALL_MASK (0x1U) |
| #define SEI_CTRL_ENGINE_EXE_STA_STALL_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_EXE_STA_TRIGERED_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_EXE_STA_TRIGERED_MASK) >> SEI_CTRL_ENGINE_EXE_STA_TRIGERED_SHIFT) |
| #define SEI_CTRL_ENGINE_EXE_STA_TRIGERED_MASK (0x100000UL) |
| #define SEI_CTRL_ENGINE_EXE_STA_TRIGERED_SHIFT (20U) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_MASK) >> SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_SHIFT) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_MASK (0x1F0000UL) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_SHIFT) & SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_MASK) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_BASE_SHIFT (16U) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_MASK) >> SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_SHIFT) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_MASK (0x1F000000UL) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_SHIFT) & SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_MASK) |
| #define SEI_CTRL_ENGINE_PTR_CFG_DAT_CDM_SHIFT (24U) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_MASK) >> SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_SHIFT) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_MASK (0xFFU) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_SHIFT) & SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_MASK) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_INIT_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_MASK) >> SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_SHIFT) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_MASK (0xFF00U) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_SHIFT) & SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_MASK) |
| #define SEI_CTRL_ENGINE_PTR_CFG_POINTER_WDOG_SHIFT (8U) |
| #define SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_MASK) >> SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_SHIFT) |
| #define SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_MASK (0xFFFFU) |
| #define SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_SHIFT) & SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_MASK) |
| #define SEI_CTRL_ENGINE_WDG_CFG_WDOG_TIME_SHIFT (0U) |
| #define SEI_CTRL_ENGINE_WDG_STA_WDOG_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_ENGINE_WDG_STA_WDOG_CNT_MASK) >> SEI_CTRL_ENGINE_WDG_STA_WDOG_CNT_SHIFT) |
| #define SEI_CTRL_ENGINE_WDG_STA_WDOG_CNT_MASK (0xFFFFU) |
| #define SEI_CTRL_ENGINE_WDG_STA_WDOG_CNT_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INSTR0_INSTR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INSTR0_INSTR_MASK) >> SEI_CTRL_IRQ_INSTR0_INSTR_SHIFT) |
| #define SEI_CTRL_IRQ_INSTR0_INSTR_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_IRQ_INSTR0_INSTR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INSTR0_INSTR_SHIFT) & SEI_CTRL_IRQ_INSTR0_INSTR_MASK) |
| #define SEI_CTRL_IRQ_INSTR0_INSTR_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INSTR1_INSTR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INSTR1_INSTR_MASK) >> SEI_CTRL_IRQ_INSTR1_INSTR_SHIFT) |
| #define SEI_CTRL_IRQ_INSTR1_INSTR_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_IRQ_INSTR1_INSTR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INSTR1_INSTR_SHIFT) & SEI_CTRL_IRQ_INSTR1_INSTR_MASK) |
| #define SEI_CTRL_IRQ_INSTR1_INSTR_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INT_EN_EXCEPT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_EXCEPT_MASK) >> SEI_CTRL_IRQ_INT_EN_EXCEPT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_EXCEPT_MASK (0x2U) |
| #define SEI_CTRL_IRQ_INT_EN_EXCEPT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_EXCEPT_SHIFT) & SEI_CTRL_IRQ_INT_EN_EXCEPT_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_EXCEPT_SHIFT (1U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_INSTR0_END_MASK) >> SEI_CTRL_IRQ_INT_EN_INSTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_END_MASK (0x400U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_INSTR0_END_SHIFT) & SEI_CTRL_IRQ_INT_EN_INSTR0_END_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_END_SHIFT (10U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_INSTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_EN_INSTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_ST_MASK (0x40U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_INSTR0_ST_SHIFT) & SEI_CTRL_IRQ_INT_EN_INSTR0_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR0_ST_SHIFT (6U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_INSTR1_END_MASK) >> SEI_CTRL_IRQ_INT_EN_INSTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_END_MASK (0x800U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_INSTR1_END_SHIFT) & SEI_CTRL_IRQ_INT_EN_INSTR1_END_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_END_SHIFT (11U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_INSTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_EN_INSTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_ST_MASK (0x80U) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_INSTR1_ST_SHIFT) & SEI_CTRL_IRQ_INT_EN_INSTR1_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_INSTR1_ST_SHIFT (7U) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_LATCH0_MASK) >> SEI_CTRL_IRQ_INT_EN_LATCH0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH0_MASK (0x10000UL) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_LATCH0_SHIFT) & SEI_CTRL_IRQ_INT_EN_LATCH0_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH0_SHIFT (16U) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_LATCH1_MASK) >> SEI_CTRL_IRQ_INT_EN_LATCH1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH1_MASK (0x20000UL) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_LATCH1_SHIFT) & SEI_CTRL_IRQ_INT_EN_LATCH1_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH1_SHIFT (17U) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_LATCH2_MASK) >> SEI_CTRL_IRQ_INT_EN_LATCH2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH2_MASK (0x40000UL) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_LATCH2_SHIFT) & SEI_CTRL_IRQ_INT_EN_LATCH2_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH2_SHIFT (18U) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_LATCH3_MASK) >> SEI_CTRL_IRQ_INT_EN_LATCH3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH3_MASK (0x80000UL) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_LATCH3_SHIFT) & SEI_CTRL_IRQ_INT_EN_LATCH3_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_LATCH3_SHIFT (19U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_PTR0_END_MASK) >> SEI_CTRL_IRQ_INT_EN_PTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_END_MASK (0x100U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_PTR0_END_SHIFT) & SEI_CTRL_IRQ_INT_EN_PTR0_END_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_END_SHIFT (8U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_PTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_EN_PTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_ST_MASK (0x10U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_PTR0_ST_SHIFT) & SEI_CTRL_IRQ_INT_EN_PTR0_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_PTR0_ST_SHIFT (4U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_PTR1_END_MASK) >> SEI_CTRL_IRQ_INT_EN_PTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_END_MASK (0x200U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_PTR1_END_SHIFT) & SEI_CTRL_IRQ_INT_EN_PTR1_END_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_END_SHIFT (9U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_PTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_EN_PTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_ST_MASK (0x20U) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_PTR1_ST_SHIFT) & SEI_CTRL_IRQ_INT_EN_PTR1_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_PTR1_ST_SHIFT (5U) |
| #define SEI_CTRL_IRQ_INT_EN_SMP_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_SMP_ERR_MASK) >> SEI_CTRL_IRQ_INT_EN_SMP_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_SMP_ERR_MASK (0x100000UL) |
| #define SEI_CTRL_IRQ_INT_EN_SMP_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_SMP_ERR_SHIFT) & SEI_CTRL_IRQ_INT_EN_SMP_ERR_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_SMP_ERR_SHIFT (20U) |
| #define SEI_CTRL_IRQ_INT_EN_STALL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_STALL_MASK) >> SEI_CTRL_IRQ_INT_EN_STALL_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_STALL_MASK (0x1U) |
| #define SEI_CTRL_IRQ_INT_EN_STALL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_STALL_SHIFT) & SEI_CTRL_IRQ_INT_EN_STALL_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_STALL_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INT_EN_TIMEOUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TIMEOUT_MASK) >> SEI_CTRL_IRQ_INT_EN_TIMEOUT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TIMEOUT_MASK (0x2000U) |
| #define SEI_CTRL_IRQ_INT_EN_TIMEOUT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TIMEOUT_SHIFT) & SEI_CTRL_IRQ_INT_EN_TIMEOUT_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TIMEOUT_SHIFT (13U) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRG_ERR0_MASK) >> SEI_CTRL_IRQ_INT_EN_TRG_ERR0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR0_MASK (0x10000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRG_ERR0_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRG_ERR0_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR0_SHIFT (28U) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRG_ERR1_MASK) >> SEI_CTRL_IRQ_INT_EN_TRG_ERR1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR1_MASK (0x20000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRG_ERR1_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRG_ERR1_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR1_SHIFT (29U) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRG_ERR2_MASK) >> SEI_CTRL_IRQ_INT_EN_TRG_ERR2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR2_MASK (0x40000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRG_ERR2_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRG_ERR2_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR2_SHIFT (30U) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRG_ERR3_MASK) >> SEI_CTRL_IRQ_INT_EN_TRG_ERR3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR3_MASK (0x80000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRG_ERR3_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRG_ERR3_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRG_ERR3_SHIFT (31U) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRIGER0_MASK) >> SEI_CTRL_IRQ_INT_EN_TRIGER0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER0_MASK (0x1000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRIGER0_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRIGER0_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER0_SHIFT (24U) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRIGER1_MASK) >> SEI_CTRL_IRQ_INT_EN_TRIGER1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER1_MASK (0x2000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRIGER1_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRIGER1_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER1_SHIFT (25U) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRIGER2_MASK) >> SEI_CTRL_IRQ_INT_EN_TRIGER2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER2_MASK (0x4000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRIGER2_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRIGER2_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER2_SHIFT (26U) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRIGER3_MASK) >> SEI_CTRL_IRQ_INT_EN_TRIGER3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER3_MASK (0x8000000UL) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRIGER3_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRIGER3_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRIGER3_SHIFT (27U) |
| #define SEI_CTRL_IRQ_INT_EN_TRX_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_TRX_ERR_MASK) >> SEI_CTRL_IRQ_INT_EN_TRX_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_TRX_ERR_MASK (0x1000U) |
| #define SEI_CTRL_IRQ_INT_EN_TRX_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_TRX_ERR_SHIFT) & SEI_CTRL_IRQ_INT_EN_TRX_ERR_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_TRX_ERR_SHIFT (12U) |
| #define SEI_CTRL_IRQ_INT_EN_WDOG_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_EN_WDOG_MASK) >> SEI_CTRL_IRQ_INT_EN_WDOG_SHIFT) |
| #define SEI_CTRL_IRQ_INT_EN_WDOG_MASK (0x4U) |
| #define SEI_CTRL_IRQ_INT_EN_WDOG_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_EN_WDOG_SHIFT) & SEI_CTRL_IRQ_INT_EN_WDOG_MASK) |
| #define SEI_CTRL_IRQ_INT_EN_WDOG_SHIFT (2U) |
| #define SEI_CTRL_IRQ_INT_FLAG_EXCEPT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_EXCEPT_MASK) >> SEI_CTRL_IRQ_INT_FLAG_EXCEPT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_EXCEPT_MASK (0x2U) |
| #define SEI_CTRL_IRQ_INT_FLAG_EXCEPT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_EXCEPT_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_EXCEPT_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_EXCEPT_SHIFT (1U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_MASK) >> SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_MASK (0x400U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_SHIFT (10U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_MASK (0x40U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_SHIFT (6U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_MASK) >> SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_MASK (0x800U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_SHIFT (11U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_MASK (0x80U) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_SHIFT (7U) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_LATCH0_MASK) >> SEI_CTRL_IRQ_INT_FLAG_LATCH0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH0_MASK (0x10000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_LATCH0_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_LATCH0_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH0_SHIFT (16U) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_LATCH1_MASK) >> SEI_CTRL_IRQ_INT_FLAG_LATCH1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH1_MASK (0x20000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_LATCH1_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_LATCH1_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH1_SHIFT (17U) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_LATCH2_MASK) >> SEI_CTRL_IRQ_INT_FLAG_LATCH2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH2_MASK (0x40000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_LATCH2_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_LATCH2_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH2_SHIFT (18U) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_LATCH3_MASK) >> SEI_CTRL_IRQ_INT_FLAG_LATCH3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH3_MASK (0x80000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_LATCH3_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_LATCH3_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_LATCH3_SHIFT (19U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_PTR0_END_MASK) >> SEI_CTRL_IRQ_INT_FLAG_PTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_END_MASK (0x100U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_PTR0_END_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_PTR0_END_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_END_SHIFT (8U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_MASK (0x10U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_SHIFT (4U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_PTR1_END_MASK) >> SEI_CTRL_IRQ_INT_FLAG_PTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_END_MASK (0x200U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_END_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_PTR1_END_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_PTR1_END_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_END_SHIFT (9U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_MASK (0x20U) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_SHIFT (5U) |
| #define SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_MASK) >> SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_MASK (0x100000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_SHIFT (20U) |
| #define SEI_CTRL_IRQ_INT_FLAG_STALL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_STALL_MASK) >> SEI_CTRL_IRQ_INT_FLAG_STALL_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_STALL_MASK (0x1U) |
| #define SEI_CTRL_IRQ_INT_FLAG_STALL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_STALL_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_STALL_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_STALL_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_MASK (0x2000U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_SHIFT (13U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_MASK (0x10000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_SHIFT (28U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_MASK (0x20000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_SHIFT (29U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_MASK (0x40000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_SHIFT (30U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_MASK (0x80000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_SHIFT (31U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRIGER0_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRIGER0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER0_MASK (0x1000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRIGER0_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRIGER0_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER0_SHIFT (24U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRIGER1_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRIGER1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER1_MASK (0x2000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER1_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRIGER1_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRIGER1_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER1_SHIFT (25U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRIGER2_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRIGER2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER2_MASK (0x4000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER2_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRIGER2_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRIGER2_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER2_SHIFT (26U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRIGER3_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRIGER3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER3_MASK (0x8000000UL) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER3_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRIGER3_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRIGER3_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRIGER3_SHIFT (27U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_MASK) >> SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_MASK (0x1000U) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_SHIFT (12U) |
| #define SEI_CTRL_IRQ_INT_FLAG_WDOG_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_FLAG_WDOG_MASK) >> SEI_CTRL_IRQ_INT_FLAG_WDOG_SHIFT) |
| #define SEI_CTRL_IRQ_INT_FLAG_WDOG_MASK (0x4U) |
| #define SEI_CTRL_IRQ_INT_FLAG_WDOG_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_INT_FLAG_WDOG_SHIFT) & SEI_CTRL_IRQ_INT_FLAG_WDOG_MASK) |
| #define SEI_CTRL_IRQ_INT_FLAG_WDOG_SHIFT (2U) |
| #define SEI_CTRL_IRQ_INT_STS_EXCEPT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_EXCEPT_MASK) >> SEI_CTRL_IRQ_INT_STS_EXCEPT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_EXCEPT_MASK (0x2U) |
| #define SEI_CTRL_IRQ_INT_STS_EXCEPT_SHIFT (1U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_INSTR0_END_MASK) >> SEI_CTRL_IRQ_INT_STS_INSTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_END_MASK (0x400U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_END_SHIFT (10U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_INSTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_STS_INSTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_ST_MASK (0x40U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR0_ST_SHIFT (6U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_INSTR1_END_MASK) >> SEI_CTRL_IRQ_INT_STS_INSTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_END_MASK (0x800U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_END_SHIFT (11U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_INSTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_STS_INSTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_ST_MASK (0x80U) |
| #define SEI_CTRL_IRQ_INT_STS_INSTR1_ST_SHIFT (7U) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_LATCH0_MASK) >> SEI_CTRL_IRQ_INT_STS_LATCH0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH0_MASK (0x10000UL) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH0_SHIFT (16U) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_LATCH1_MASK) >> SEI_CTRL_IRQ_INT_STS_LATCH1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH1_MASK (0x20000UL) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH1_SHIFT (17U) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_LATCH2_MASK) >> SEI_CTRL_IRQ_INT_STS_LATCH2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH2_MASK (0x40000UL) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH2_SHIFT (18U) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_LATCH3_MASK) >> SEI_CTRL_IRQ_INT_STS_LATCH3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH3_MASK (0x80000UL) |
| #define SEI_CTRL_IRQ_INT_STS_LATCH3_SHIFT (19U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_PTR0_END_MASK) >> SEI_CTRL_IRQ_INT_STS_PTR0_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_END_MASK (0x100U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_END_SHIFT (8U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_PTR0_ST_MASK) >> SEI_CTRL_IRQ_INT_STS_PTR0_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_ST_MASK (0x10U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR0_ST_SHIFT (4U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_END_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_PTR1_END_MASK) >> SEI_CTRL_IRQ_INT_STS_PTR1_END_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_END_MASK (0x200U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_END_SHIFT (9U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_ST_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_PTR1_ST_MASK) >> SEI_CTRL_IRQ_INT_STS_PTR1_ST_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_ST_MASK (0x20U) |
| #define SEI_CTRL_IRQ_INT_STS_PTR1_ST_SHIFT (5U) |
| #define SEI_CTRL_IRQ_INT_STS_SMP_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_SMP_ERR_MASK) >> SEI_CTRL_IRQ_INT_STS_SMP_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_SMP_ERR_MASK (0x100000UL) |
| #define SEI_CTRL_IRQ_INT_STS_SMP_ERR_SHIFT (20U) |
| #define SEI_CTRL_IRQ_INT_STS_STALL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_STALL_MASK) >> SEI_CTRL_IRQ_INT_STS_STALL_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_STALL_MASK (0x1U) |
| #define SEI_CTRL_IRQ_INT_STS_STALL_SHIFT (0U) |
| #define SEI_CTRL_IRQ_INT_STS_TIMEOUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TIMEOUT_MASK) >> SEI_CTRL_IRQ_INT_STS_TIMEOUT_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TIMEOUT_MASK (0x2000U) |
| #define SEI_CTRL_IRQ_INT_STS_TIMEOUT_SHIFT (13U) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRG_ERR0_MASK) >> SEI_CTRL_IRQ_INT_STS_TRG_ERR0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR0_MASK (0x10000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR0_SHIFT (28U) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRG_ERR1_MASK) >> SEI_CTRL_IRQ_INT_STS_TRG_ERR1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR1_MASK (0x20000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR1_SHIFT (29U) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRG_ERR2_MASK) >> SEI_CTRL_IRQ_INT_STS_TRG_ERR2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR2_MASK (0x40000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR2_SHIFT (30U) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRG_ERR3_MASK) >> SEI_CTRL_IRQ_INT_STS_TRG_ERR3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR3_MASK (0x80000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRG_ERR3_SHIFT (31U) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRIGER0_MASK) >> SEI_CTRL_IRQ_INT_STS_TRIGER0_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER0_MASK (0x1000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER0_SHIFT (24U) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER1_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRIGER1_MASK) >> SEI_CTRL_IRQ_INT_STS_TRIGER1_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER1_MASK (0x2000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER1_SHIFT (25U) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER2_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRIGER2_MASK) >> SEI_CTRL_IRQ_INT_STS_TRIGER2_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER2_MASK (0x4000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER2_SHIFT (26U) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER3_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRIGER3_MASK) >> SEI_CTRL_IRQ_INT_STS_TRIGER3_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER3_MASK (0x8000000UL) |
| #define SEI_CTRL_IRQ_INT_STS_TRIGER3_SHIFT (27U) |
| #define SEI_CTRL_IRQ_INT_STS_TRX_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_TRX_ERR_MASK) >> SEI_CTRL_IRQ_INT_STS_TRX_ERR_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_TRX_ERR_MASK (0x1000U) |
| #define SEI_CTRL_IRQ_INT_STS_TRX_ERR_SHIFT (12U) |
| #define SEI_CTRL_IRQ_INT_STS_WDOG_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_INT_STS_WDOG_MASK) >> SEI_CTRL_IRQ_INT_STS_WDOG_SHIFT) |
| #define SEI_CTRL_IRQ_INT_STS_WDOG_MASK (0x4U) |
| #define SEI_CTRL_IRQ_INT_STS_WDOG_SHIFT (2U) |
| #define SEI_CTRL_IRQ_POINTER0_POINTER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_POINTER0_POINTER_MASK) >> SEI_CTRL_IRQ_POINTER0_POINTER_SHIFT) |
| #define SEI_CTRL_IRQ_POINTER0_POINTER_MASK (0xFFU) |
| #define SEI_CTRL_IRQ_POINTER0_POINTER_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_POINTER0_POINTER_SHIFT) & SEI_CTRL_IRQ_POINTER0_POINTER_MASK) |
| #define SEI_CTRL_IRQ_POINTER0_POINTER_SHIFT (0U) |
| #define SEI_CTRL_IRQ_POINTER1_POINTER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_IRQ_POINTER1_POINTER_MASK) >> SEI_CTRL_IRQ_POINTER1_POINTER_SHIFT) |
| #define SEI_CTRL_IRQ_POINTER1_POINTER_MASK (0xFFU) |
| #define SEI_CTRL_IRQ_POINTER1_POINTER_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_IRQ_POINTER1_POINTER_SHIFT) & SEI_CTRL_IRQ_POINTER1_POINTER_MASK) |
| #define SEI_CTRL_IRQ_POINTER1_POINTER_SHIFT (0U) |
| #define SEI_CTRL_LATCH_CFG_DELAY_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_CFG_DELAY_MASK) >> SEI_CTRL_LATCH_CFG_DELAY_SHIFT) |
| #define SEI_CTRL_LATCH_CFG_DELAY_MASK (0xFFFFU) |
| #define SEI_CTRL_LATCH_CFG_DELAY_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_CFG_DELAY_SHIFT) & SEI_CTRL_LATCH_CFG_DELAY_MASK) |
| #define SEI_CTRL_LATCH_CFG_DELAY_SHIFT (0U) |
| #define SEI_CTRL_LATCH_CFG_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_CFG_EN_MASK) >> SEI_CTRL_LATCH_CFG_EN_SHIFT) |
| #define SEI_CTRL_LATCH_CFG_EN_MASK (0x80000000UL) |
| #define SEI_CTRL_LATCH_CFG_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_CFG_EN_SHIFT) & SEI_CTRL_LATCH_CFG_EN_MASK) |
| #define SEI_CTRL_LATCH_CFG_EN_SHIFT (31U) |
| #define SEI_CTRL_LATCH_CFG_SELECT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_CFG_SELECT_MASK) >> SEI_CTRL_LATCH_CFG_SELECT_SHIFT) |
| #define SEI_CTRL_LATCH_CFG_SELECT_MASK (0x7000000UL) |
| #define SEI_CTRL_LATCH_CFG_SELECT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_CFG_SELECT_SHIFT) & SEI_CTRL_LATCH_CFG_SELECT_MASK) |
| #define SEI_CTRL_LATCH_CFG_SELECT_SHIFT (24U) |
| #define SEI_CTRL_LATCH_STS_LAT_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_STS_LAT_CNT_MASK) >> SEI_CTRL_LATCH_STS_LAT_CNT_SHIFT) |
| #define SEI_CTRL_LATCH_STS_LAT_CNT_MASK (0xFFFFU) |
| #define SEI_CTRL_LATCH_STS_LAT_CNT_SHIFT (0U) |
| #define SEI_CTRL_LATCH_STS_STATE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_STS_STATE_MASK) >> SEI_CTRL_LATCH_STS_STATE_SHIFT) |
| #define SEI_CTRL_LATCH_STS_STATE_MASK (0x7000000UL) |
| #define SEI_CTRL_LATCH_STS_STATE_SHIFT (24U) |
| #define SEI_CTRL_LATCH_TIME_LAT_TIME_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TIME_LAT_TIME_MASK) >> SEI_CTRL_LATCH_TIME_LAT_TIME_SHIFT) |
| #define SEI_CTRL_LATCH_TIME_LAT_TIME_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_LATCH_TIME_LAT_TIME_SHIFT (0U) |
| #define SEI_CTRL_LATCH_TRAN_0_1 (0UL) |
| #define SEI_CTRL_LATCH_TRAN_1_2 (1UL) |
| #define SEI_CTRL_LATCH_TRAN_2_3 (2UL) |
| #define SEI_CTRL_LATCH_TRAN_3_0 (3UL) |
| #define SEI_CTRL_LATCH_TRAN_CFG_CLK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_CFG_CLK_MASK) >> SEI_CTRL_LATCH_TRAN_CFG_CLK_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_CFG_CLK_MASK (0xC00U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_CLK_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_CFG_CLK_SHIFT) & SEI_CTRL_LATCH_TRAN_CFG_CLK_MASK) |
| #define SEI_CTRL_LATCH_TRAN_CFG_CLK_SHIFT (10U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_PTR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_CFG_PTR_MASK) >> SEI_CTRL_LATCH_TRAN_CFG_PTR_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_CFG_PTR_MASK (0x300U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_PTR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_CFG_PTR_SHIFT) & SEI_CTRL_LATCH_TRAN_CFG_PTR_MASK) |
| #define SEI_CTRL_LATCH_TRAN_CFG_PTR_SHIFT (8U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_RXD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_CFG_RXD_MASK) >> SEI_CTRL_LATCH_TRAN_CFG_RXD_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_CFG_RXD_MASK (0xC000U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_RXD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_CFG_RXD_SHIFT) & SEI_CTRL_LATCH_TRAN_CFG_RXD_MASK) |
| #define SEI_CTRL_LATCH_TRAN_CFG_RXD_SHIFT (14U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TM_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_CFG_TM_MASK) >> SEI_CTRL_LATCH_TRAN_CFG_TM_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TM_MASK (0x30000UL) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TM_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_CFG_TM_SHIFT) & SEI_CTRL_LATCH_TRAN_CFG_TM_MASK) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TM_SHIFT (16U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TXD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_CFG_TXD_MASK) >> SEI_CTRL_LATCH_TRAN_CFG_TXD_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TXD_MASK (0x3000U) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TXD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_CFG_TXD_SHIFT) & SEI_CTRL_LATCH_TRAN_CFG_TXD_MASK) |
| #define SEI_CTRL_LATCH_TRAN_CFG_TXD_SHIFT (12U) |
| #define SEI_CTRL_LATCH_TRAN_OV_CLK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_OV_CLK_MASK) >> SEI_CTRL_LATCH_TRAN_OV_CLK_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_OV_CLK_MASK (0x2U) |
| #define SEI_CTRL_LATCH_TRAN_OV_CLK_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_OV_CLK_SHIFT) & SEI_CTRL_LATCH_TRAN_OV_CLK_MASK) |
| #define SEI_CTRL_LATCH_TRAN_OV_CLK_SHIFT (1U) |
| #define SEI_CTRL_LATCH_TRAN_OV_PTR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_OV_PTR_MASK) >> SEI_CTRL_LATCH_TRAN_OV_PTR_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_OV_PTR_MASK (0x1U) |
| #define SEI_CTRL_LATCH_TRAN_OV_PTR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_OV_PTR_SHIFT) & SEI_CTRL_LATCH_TRAN_OV_PTR_MASK) |
| #define SEI_CTRL_LATCH_TRAN_OV_PTR_SHIFT (0U) |
| #define SEI_CTRL_LATCH_TRAN_OV_RXD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_OV_RXD_MASK) >> SEI_CTRL_LATCH_TRAN_OV_RXD_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_OV_RXD_MASK (0x8U) |
| #define SEI_CTRL_LATCH_TRAN_OV_RXD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_OV_RXD_SHIFT) & SEI_CTRL_LATCH_TRAN_OV_RXD_MASK) |
| #define SEI_CTRL_LATCH_TRAN_OV_RXD_SHIFT (3U) |
| #define SEI_CTRL_LATCH_TRAN_OV_TM_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_OV_TM_MASK) >> SEI_CTRL_LATCH_TRAN_OV_TM_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_OV_TM_MASK (0x10U) |
| #define SEI_CTRL_LATCH_TRAN_OV_TM_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_OV_TM_SHIFT) & SEI_CTRL_LATCH_TRAN_OV_TM_MASK) |
| #define SEI_CTRL_LATCH_TRAN_OV_TM_SHIFT (4U) |
| #define SEI_CTRL_LATCH_TRAN_OV_TXD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_OV_TXD_MASK) >> SEI_CTRL_LATCH_TRAN_OV_TXD_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_OV_TXD_MASK (0x4U) |
| #define SEI_CTRL_LATCH_TRAN_OV_TXD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_OV_TXD_SHIFT) & SEI_CTRL_LATCH_TRAN_OV_TXD_MASK) |
| #define SEI_CTRL_LATCH_TRAN_OV_TXD_SHIFT (2U) |
| #define SEI_CTRL_LATCH_TRAN_POINTER_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_LATCH_TRAN_POINTER_MASK) >> SEI_CTRL_LATCH_TRAN_POINTER_SHIFT) |
| #define SEI_CTRL_LATCH_TRAN_POINTER_MASK (0xFF000000UL) |
| #define SEI_CTRL_LATCH_TRAN_POINTER_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_LATCH_TRAN_POINTER_SHIFT) & SEI_CTRL_LATCH_TRAN_POINTER_MASK) |
| #define SEI_CTRL_LATCH_TRAN_POINTER_SHIFT (24U) |
| #define SEI_CTRL_POS_ACC_IN_ACC_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_ACC_IN_ACC_MASK) >> SEI_CTRL_POS_ACC_IN_ACC_SHIFT) |
| #define SEI_CTRL_POS_ACC_IN_ACC_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_ACC_IN_ACC_SHIFT (0U) |
| #define SEI_CTRL_POS_POS_IN_POS_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_POS_IN_POS_MASK) >> SEI_CTRL_POS_POS_IN_POS_SHIFT) |
| #define SEI_CTRL_POS_POS_IN_POS_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_POS_IN_POS_SHIFT (0U) |
| #define SEI_CTRL_POS_REV_IN_REV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_REV_IN_REV_MASK) >> SEI_CTRL_POS_REV_IN_REV_SHIFT) |
| #define SEI_CTRL_POS_REV_IN_REV_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_REV_IN_REV_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_ACC_ACC_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_ACC_ACC_MASK) >> SEI_CTRL_POS_SMP_ACC_ACC_SHIFT) |
| #define SEI_CTRL_POS_SMP_ACC_ACC_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SMP_ACC_ACC_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_ACC_ACC_SHIFT) & SEI_CTRL_POS_SMP_ACC_ACC_MASK) |
| #define SEI_CTRL_POS_SMP_ACC_ACC_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_CFG_LAT_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_CFG_LAT_SEL_MASK) >> SEI_CTRL_POS_SMP_CFG_LAT_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_CFG_LAT_SEL_MASK (0x30000UL) |
| #define SEI_CTRL_POS_SMP_CFG_LAT_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_CFG_LAT_SEL_SHIFT) & SEI_CTRL_POS_SMP_CFG_LAT_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_CFG_LAT_SEL_SHIFT (16U) |
| #define SEI_CTRL_POS_SMP_CFG_ONCE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_CFG_ONCE_MASK) >> SEI_CTRL_POS_SMP_CFG_ONCE_SHIFT) |
| #define SEI_CTRL_POS_SMP_CFG_ONCE_MASK (0x1000000UL) |
| #define SEI_CTRL_POS_SMP_CFG_ONCE_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_CFG_ONCE_SHIFT) & SEI_CTRL_POS_SMP_CFG_ONCE_MASK) |
| #define SEI_CTRL_POS_SMP_CFG_ONCE_SHIFT (24U) |
| #define SEI_CTRL_POS_SMP_CFG_WINDOW_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_CFG_WINDOW_MASK) >> SEI_CTRL_POS_SMP_CFG_WINDOW_SHIFT) |
| #define SEI_CTRL_POS_SMP_CFG_WINDOW_MASK (0xFFFFU) |
| #define SEI_CTRL_POS_SMP_CFG_WINDOW_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_CFG_WINDOW_SHIFT) & SEI_CTRL_POS_SMP_CFG_WINDOW_MASK) |
| #define SEI_CTRL_POS_SMP_CFG_WINDOW_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_DAT_DAT_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_DAT_DAT_SEL_MASK) >> SEI_CTRL_POS_SMP_DAT_DAT_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_DAT_DAT_SEL_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SMP_DAT_DAT_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_DAT_DAT_SEL_SHIFT) & SEI_CTRL_POS_SMP_DAT_DAT_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_DAT_DAT_SEL_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_EN_ACC_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_ACC_EN_MASK) >> SEI_CTRL_POS_SMP_EN_ACC_EN_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_ACC_EN_MASK (0x80000000UL) |
| #define SEI_CTRL_POS_SMP_EN_ACC_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_ACC_EN_SHIFT) & SEI_CTRL_POS_SMP_EN_ACC_EN_MASK) |
| #define SEI_CTRL_POS_SMP_EN_ACC_EN_SHIFT (31U) |
| #define SEI_CTRL_POS_SMP_EN_ACC_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_ACC_SEL_MASK) >> SEI_CTRL_POS_SMP_EN_ACC_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_ACC_SEL_MASK (0x1F000000UL) |
| #define SEI_CTRL_POS_SMP_EN_ACC_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_ACC_SEL_SHIFT) & SEI_CTRL_POS_SMP_EN_ACC_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_EN_ACC_SEL_SHIFT (24U) |
| #define SEI_CTRL_POS_SMP_EN_POS_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_POS_EN_MASK) >> SEI_CTRL_POS_SMP_EN_POS_EN_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_POS_EN_MASK (0x80U) |
| #define SEI_CTRL_POS_SMP_EN_POS_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_POS_EN_SHIFT) & SEI_CTRL_POS_SMP_EN_POS_EN_MASK) |
| #define SEI_CTRL_POS_SMP_EN_POS_EN_SHIFT (7U) |
| #define SEI_CTRL_POS_SMP_EN_POS_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_POS_SEL_MASK) >> SEI_CTRL_POS_SMP_EN_POS_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_POS_SEL_MASK (0x1FU) |
| #define SEI_CTRL_POS_SMP_EN_POS_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_POS_SEL_SHIFT) & SEI_CTRL_POS_SMP_EN_POS_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_EN_POS_SEL_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_EN_REV_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_REV_EN_MASK) >> SEI_CTRL_POS_SMP_EN_REV_EN_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_REV_EN_MASK (0x8000U) |
| #define SEI_CTRL_POS_SMP_EN_REV_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_REV_EN_SHIFT) & SEI_CTRL_POS_SMP_EN_REV_EN_MASK) |
| #define SEI_CTRL_POS_SMP_EN_REV_EN_SHIFT (15U) |
| #define SEI_CTRL_POS_SMP_EN_REV_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_REV_SEL_MASK) >> SEI_CTRL_POS_SMP_EN_REV_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_REV_SEL_MASK (0x1F00U) |
| #define SEI_CTRL_POS_SMP_EN_REV_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_REV_SEL_SHIFT) & SEI_CTRL_POS_SMP_EN_REV_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_EN_REV_SEL_SHIFT (8U) |
| #define SEI_CTRL_POS_SMP_EN_SPD_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_SPD_EN_MASK) >> SEI_CTRL_POS_SMP_EN_SPD_EN_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_SPD_EN_MASK (0x800000UL) |
| #define SEI_CTRL_POS_SMP_EN_SPD_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_SPD_EN_SHIFT) & SEI_CTRL_POS_SMP_EN_SPD_EN_MASK) |
| #define SEI_CTRL_POS_SMP_EN_SPD_EN_SHIFT (23U) |
| #define SEI_CTRL_POS_SMP_EN_SPD_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_EN_SPD_SEL_MASK) >> SEI_CTRL_POS_SMP_EN_SPD_SEL_SHIFT) |
| #define SEI_CTRL_POS_SMP_EN_SPD_SEL_MASK (0x1F0000UL) |
| #define SEI_CTRL_POS_SMP_EN_SPD_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_EN_SPD_SEL_SHIFT) & SEI_CTRL_POS_SMP_EN_SPD_SEL_MASK) |
| #define SEI_CTRL_POS_SMP_EN_SPD_SEL_SHIFT (16U) |
| #define SEI_CTRL_POS_SMP_POS_POS_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_POS_POS_MASK) >> SEI_CTRL_POS_SMP_POS_POS_SHIFT) |
| #define SEI_CTRL_POS_SMP_POS_POS_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SMP_POS_POS_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_POS_POS_SHIFT) & SEI_CTRL_POS_SMP_POS_POS_MASK) |
| #define SEI_CTRL_POS_SMP_POS_POS_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_REV_REV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_REV_REV_MASK) >> SEI_CTRL_POS_SMP_REV_REV_SHIFT) |
| #define SEI_CTRL_POS_SMP_REV_REV_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SMP_REV_REV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_REV_REV_SHIFT) & SEI_CTRL_POS_SMP_REV_REV_MASK) |
| #define SEI_CTRL_POS_SMP_REV_REV_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_SPD_SPD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_SPD_SPD_MASK) >> SEI_CTRL_POS_SMP_SPD_SPD_SHIFT) |
| #define SEI_CTRL_POS_SMP_SPD_SPD_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SMP_SPD_SPD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_SMP_SPD_SPD_SHIFT) & SEI_CTRL_POS_SMP_SPD_SPD_MASK) |
| #define SEI_CTRL_POS_SMP_SPD_SPD_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_STS_OCCUR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_STS_OCCUR_MASK) >> SEI_CTRL_POS_SMP_STS_OCCUR_SHIFT) |
| #define SEI_CTRL_POS_SMP_STS_OCCUR_MASK (0x1000000UL) |
| #define SEI_CTRL_POS_SMP_STS_OCCUR_SHIFT (24U) |
| #define SEI_CTRL_POS_SMP_STS_WIN_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_STS_WIN_CNT_MASK) >> SEI_CTRL_POS_SMP_STS_WIN_CNT_SHIFT) |
| #define SEI_CTRL_POS_SMP_STS_WIN_CNT_MASK (0xFFFFU) |
| #define SEI_CTRL_POS_SMP_STS_WIN_CNT_SHIFT (0U) |
| #define SEI_CTRL_POS_SMP_VAL_ACC_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_VAL_ACC_MASK) >> SEI_CTRL_POS_SMP_VAL_ACC_SHIFT) |
| #define SEI_CTRL_POS_SMP_VAL_ACC_MASK (0x80000000UL) |
| #define SEI_CTRL_POS_SMP_VAL_ACC_SHIFT (31U) |
| #define SEI_CTRL_POS_SMP_VAL_POS_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_VAL_POS_MASK) >> SEI_CTRL_POS_SMP_VAL_POS_SHIFT) |
| #define SEI_CTRL_POS_SMP_VAL_POS_MASK (0x80U) |
| #define SEI_CTRL_POS_SMP_VAL_POS_SHIFT (7U) |
| #define SEI_CTRL_POS_SMP_VAL_REV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_VAL_REV_MASK) >> SEI_CTRL_POS_SMP_VAL_REV_SHIFT) |
| #define SEI_CTRL_POS_SMP_VAL_REV_MASK (0x8000U) |
| #define SEI_CTRL_POS_SMP_VAL_REV_SHIFT (15U) |
| #define SEI_CTRL_POS_SMP_VAL_SPD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SMP_VAL_SPD_MASK) >> SEI_CTRL_POS_SMP_VAL_SPD_SHIFT) |
| #define SEI_CTRL_POS_SMP_VAL_SPD_MASK (0x800000UL) |
| #define SEI_CTRL_POS_SMP_VAL_SPD_SHIFT (23U) |
| #define SEI_CTRL_POS_SPD_IN_SPD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_SPD_IN_SPD_MASK) >> SEI_CTRL_POS_SPD_IN_SPD_SHIFT) |
| #define SEI_CTRL_POS_SPD_IN_SPD_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_SPD_IN_SPD_SHIFT (0U) |
| #define SEI_CTRL_POS_TIME_IN_TIME_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_TIME_IN_TIME_MASK) >> SEI_CTRL_POS_TIME_IN_TIME_SHIFT) |
| #define SEI_CTRL_POS_TIME_IN_TIME_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_TIME_IN_TIME_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_ACC_ACC_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_ACC_ACC_MASK) >> SEI_CTRL_POS_UPD_ACC_ACC_SHIFT) |
| #define SEI_CTRL_POS_UPD_ACC_ACC_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_ACC_ACC_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_ACC_ACC_SHIFT) & SEI_CTRL_POS_UPD_ACC_ACC_MASK) |
| #define SEI_CTRL_POS_UPD_ACC_ACC_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_CFG_LAT_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_CFG_LAT_SEL_MASK) >> SEI_CTRL_POS_UPD_CFG_LAT_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_CFG_LAT_SEL_MASK (0x30000UL) |
| #define SEI_CTRL_POS_UPD_CFG_LAT_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_CFG_LAT_SEL_SHIFT) & SEI_CTRL_POS_UPD_CFG_LAT_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_CFG_LAT_SEL_SHIFT (16U) |
| #define SEI_CTRL_POS_UPD_CFG_ONERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_CFG_ONERR_MASK) >> SEI_CTRL_POS_UPD_CFG_ONERR_SHIFT) |
| #define SEI_CTRL_POS_UPD_CFG_ONERR_MASK (0x1000000UL) |
| #define SEI_CTRL_POS_UPD_CFG_ONERR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_CFG_ONERR_SHIFT) & SEI_CTRL_POS_UPD_CFG_ONERR_MASK) |
| #define SEI_CTRL_POS_UPD_CFG_ONERR_SHIFT (24U) |
| #define SEI_CTRL_POS_UPD_CFG_TIME_OVRD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_CFG_TIME_OVRD_MASK) >> SEI_CTRL_POS_UPD_CFG_TIME_OVRD_SHIFT) |
| #define SEI_CTRL_POS_UPD_CFG_TIME_OVRD_MASK (0x80000000UL) |
| #define SEI_CTRL_POS_UPD_CFG_TIME_OVRD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_CFG_TIME_OVRD_SHIFT) & SEI_CTRL_POS_UPD_CFG_TIME_OVRD_MASK) |
| #define SEI_CTRL_POS_UPD_CFG_TIME_OVRD_SHIFT (31U) |
| #define SEI_CTRL_POS_UPD_DAT_DAT_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_DAT_DAT_SEL_MASK) >> SEI_CTRL_POS_UPD_DAT_DAT_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_DAT_DAT_SEL_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_DAT_DAT_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_DAT_DAT_SEL_SHIFT) & SEI_CTRL_POS_UPD_DAT_DAT_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_DAT_DAT_SEL_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_EN_ACC_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_ACC_EN_MASK) >> SEI_CTRL_POS_UPD_EN_ACC_EN_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_ACC_EN_MASK (0x80000000UL) |
| #define SEI_CTRL_POS_UPD_EN_ACC_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_ACC_EN_SHIFT) & SEI_CTRL_POS_UPD_EN_ACC_EN_MASK) |
| #define SEI_CTRL_POS_UPD_EN_ACC_EN_SHIFT (31U) |
| #define SEI_CTRL_POS_UPD_EN_ACC_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_ACC_SEL_MASK) >> SEI_CTRL_POS_UPD_EN_ACC_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_ACC_SEL_MASK (0x1F000000UL) |
| #define SEI_CTRL_POS_UPD_EN_ACC_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_ACC_SEL_SHIFT) & SEI_CTRL_POS_UPD_EN_ACC_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_EN_ACC_SEL_SHIFT (24U) |
| #define SEI_CTRL_POS_UPD_EN_POS_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_POS_EN_MASK) >> SEI_CTRL_POS_UPD_EN_POS_EN_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_POS_EN_MASK (0x80U) |
| #define SEI_CTRL_POS_UPD_EN_POS_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_POS_EN_SHIFT) & SEI_CTRL_POS_UPD_EN_POS_EN_MASK) |
| #define SEI_CTRL_POS_UPD_EN_POS_EN_SHIFT (7U) |
| #define SEI_CTRL_POS_UPD_EN_POS_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_POS_SEL_MASK) >> SEI_CTRL_POS_UPD_EN_POS_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_POS_SEL_MASK (0x1FU) |
| #define SEI_CTRL_POS_UPD_EN_POS_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_POS_SEL_SHIFT) & SEI_CTRL_POS_UPD_EN_POS_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_EN_POS_SEL_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_EN_REV_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_REV_EN_MASK) >> SEI_CTRL_POS_UPD_EN_REV_EN_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_REV_EN_MASK (0x8000U) |
| #define SEI_CTRL_POS_UPD_EN_REV_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_REV_EN_SHIFT) & SEI_CTRL_POS_UPD_EN_REV_EN_MASK) |
| #define SEI_CTRL_POS_UPD_EN_REV_EN_SHIFT (15U) |
| #define SEI_CTRL_POS_UPD_EN_REV_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_REV_SEL_MASK) >> SEI_CTRL_POS_UPD_EN_REV_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_REV_SEL_MASK (0x1F00U) |
| #define SEI_CTRL_POS_UPD_EN_REV_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_REV_SEL_SHIFT) & SEI_CTRL_POS_UPD_EN_REV_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_EN_REV_SEL_SHIFT (8U) |
| #define SEI_CTRL_POS_UPD_EN_SPD_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_SPD_EN_MASK) >> SEI_CTRL_POS_UPD_EN_SPD_EN_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_SPD_EN_MASK (0x800000UL) |
| #define SEI_CTRL_POS_UPD_EN_SPD_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_SPD_EN_SHIFT) & SEI_CTRL_POS_UPD_EN_SPD_EN_MASK) |
| #define SEI_CTRL_POS_UPD_EN_SPD_EN_SHIFT (23U) |
| #define SEI_CTRL_POS_UPD_EN_SPD_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_EN_SPD_SEL_MASK) >> SEI_CTRL_POS_UPD_EN_SPD_SEL_SHIFT) |
| #define SEI_CTRL_POS_UPD_EN_SPD_SEL_MASK (0x1F0000UL) |
| #define SEI_CTRL_POS_UPD_EN_SPD_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_EN_SPD_SEL_SHIFT) & SEI_CTRL_POS_UPD_EN_SPD_SEL_MASK) |
| #define SEI_CTRL_POS_UPD_EN_SPD_SEL_SHIFT (16U) |
| #define SEI_CTRL_POS_UPD_POS_POS_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_POS_POS_MASK) >> SEI_CTRL_POS_UPD_POS_POS_SHIFT) |
| #define SEI_CTRL_POS_UPD_POS_POS_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_POS_POS_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_POS_POS_SHIFT) & SEI_CTRL_POS_UPD_POS_POS_MASK) |
| #define SEI_CTRL_POS_UPD_POS_POS_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_REV_REV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_REV_REV_MASK) >> SEI_CTRL_POS_UPD_REV_REV_SHIFT) |
| #define SEI_CTRL_POS_UPD_REV_REV_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_REV_REV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_REV_REV_SHIFT) & SEI_CTRL_POS_UPD_REV_REV_MASK) |
| #define SEI_CTRL_POS_UPD_REV_REV_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_SPD_SPD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_SPD_SPD_MASK) >> SEI_CTRL_POS_UPD_SPD_SPD_SHIFT) |
| #define SEI_CTRL_POS_UPD_SPD_SPD_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_SPD_SPD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_SPD_SPD_SHIFT) & SEI_CTRL_POS_UPD_SPD_SPD_MASK) |
| #define SEI_CTRL_POS_UPD_SPD_SPD_SHIFT (0U) |
| #define SEI_CTRL_POS_UPD_STS_UPD_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_STS_UPD_ERR_MASK) >> SEI_CTRL_POS_UPD_STS_UPD_ERR_SHIFT) |
| #define SEI_CTRL_POS_UPD_STS_UPD_ERR_MASK (0x1000000UL) |
| #define SEI_CTRL_POS_UPD_STS_UPD_ERR_SHIFT (24U) |
| #define SEI_CTRL_POS_UPD_TIME_TIME_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_POS_UPD_TIME_TIME_MASK) >> SEI_CTRL_POS_UPD_TIME_TIME_SHIFT) |
| #define SEI_CTRL_POS_UPD_TIME_TIME_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_POS_UPD_TIME_TIME_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_POS_UPD_TIME_TIME_SHIFT) & SEI_CTRL_POS_UPD_TIME_TIME_MASK) |
| #define SEI_CTRL_POS_UPD_TIME_TIME_SHIFT (0U) |
| #define SEI_CTRL_TRG_DIV_STS_IN0_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_DIV_STS_IN0_CNT_MASK) >> SEI_CTRL_TRG_DIV_STS_IN0_CNT_SHIFT) |
| #define SEI_CTRL_TRG_DIV_STS_IN0_CNT_MASK (0xFFU) |
| #define SEI_CTRL_TRG_DIV_STS_IN0_CNT_SHIFT (0U) |
| #define SEI_CTRL_TRG_DIV_STS_IN1_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_DIV_STS_IN1_CNT_MASK) >> SEI_CTRL_TRG_DIV_STS_IN1_CNT_SHIFT) |
| #define SEI_CTRL_TRG_DIV_STS_IN1_CNT_MASK (0xFF00U) |
| #define SEI_CTRL_TRG_DIV_STS_IN1_CNT_SHIFT (8U) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK) >> SEI_CTRL_TRG_IN_CFG_IN0_EN_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK (0x80U) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_IN0_EN_SHIFT) & SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_EN_SHIFT (7U) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_IN0_SEL_MASK) >> SEI_CTRL_TRG_IN_CFG_IN0_SEL_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_SEL_MASK (0x7U) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_IN0_SEL_SHIFT) & SEI_CTRL_TRG_IN_CFG_IN0_SEL_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_IN0_SEL_SHIFT (0U) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK) >> SEI_CTRL_TRG_IN_CFG_IN1_EN_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK (0x8000U) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_IN1_EN_SHIFT) & SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_EN_SHIFT (15U) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_IN1_SEL_MASK) >> SEI_CTRL_TRG_IN_CFG_IN1_SEL_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_SEL_MASK (0x700U) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_IN1_SEL_SHIFT) & SEI_CTRL_TRG_IN_CFG_IN1_SEL_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_IN1_SEL_SHIFT (8U) |
| #define SEI_CTRL_TRG_IN_CFG_PRD_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK) >> SEI_CTRL_TRG_IN_CFG_PRD_EN_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK (0x800000UL) |
| #define SEI_CTRL_TRG_IN_CFG_PRD_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_PRD_EN_SHIFT) & SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_PRD_EN_SHIFT (23U) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_REWIND_EN_MASK) >> SEI_CTRL_TRG_IN_CFG_REWIND_EN_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_EN_MASK (0x80000000UL) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_REWIND_EN_SHIFT) & SEI_CTRL_TRG_IN_CFG_REWIND_EN_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_EN_SHIFT (31U) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_REWIND_SEL_MASK) >> SEI_CTRL_TRG_IN_CFG_REWIND_SEL_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_SEL_MASK (0x3000000UL) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_REWIND_SEL_SHIFT) & SEI_CTRL_TRG_IN_CFG_REWIND_SEL_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_REWIND_SEL_SHIFT (24U) |
| #define SEI_CTRL_TRG_IN_CFG_SYNC_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_CFG_SYNC_SEL_MASK) >> SEI_CTRL_TRG_IN_CFG_SYNC_SEL_SHIFT) |
| #define SEI_CTRL_TRG_IN_CFG_SYNC_SEL_MASK (0x70000UL) |
| #define SEI_CTRL_TRG_IN_CFG_SYNC_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_CFG_SYNC_SEL_SHIFT) & SEI_CTRL_TRG_IN_CFG_SYNC_SEL_MASK) |
| #define SEI_CTRL_TRG_IN_CFG_SYNC_SEL_SHIFT (16U) |
| #define SEI_CTRL_TRG_IN_DIV_IN0_DIV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_DIV_IN0_DIV_MASK) >> SEI_CTRL_TRG_IN_DIV_IN0_DIV_SHIFT) |
| #define SEI_CTRL_TRG_IN_DIV_IN0_DIV_MASK (0xFFU) |
| #define SEI_CTRL_TRG_IN_DIV_IN0_DIV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_DIV_IN0_DIV_SHIFT) & SEI_CTRL_TRG_IN_DIV_IN0_DIV_MASK) |
| #define SEI_CTRL_TRG_IN_DIV_IN0_DIV_SHIFT (0U) |
| #define SEI_CTRL_TRG_IN_DIV_IN1_DIV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_IN_DIV_IN1_DIV_MASK) >> SEI_CTRL_TRG_IN_DIV_IN1_DIV_SHIFT) |
| #define SEI_CTRL_TRG_IN_DIV_IN1_DIV_MASK (0xFF00U) |
| #define SEI_CTRL_TRG_IN_DIV_IN1_DIV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_IN_DIV_IN1_DIV_SHIFT) & SEI_CTRL_TRG_IN_DIV_IN1_DIV_MASK) |
| #define SEI_CTRL_TRG_IN_DIV_IN1_DIV_SHIFT (8U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT0_EN_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT0_EN_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_EN_MASK (0x80U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT0_EN_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT0_EN_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_EN_SHIFT (7U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_MASK (0x7U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT0_SEL_SHIFT (0U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT1_EN_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT1_EN_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_EN_MASK (0x8000U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT1_EN_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT1_EN_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_EN_SHIFT (15U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_MASK (0x700U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT1_SEL_SHIFT (8U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT2_EN_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT2_EN_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_EN_MASK (0x800000UL) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT2_EN_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT2_EN_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_EN_SHIFT (23U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_MASK (0x70000UL) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT2_SEL_SHIFT (16U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT3_EN_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT3_EN_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_EN_MASK (0x80000000UL) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT3_EN_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT3_EN_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_EN_SHIFT (31U) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_MASK) >> SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_SHIFT) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_MASK (0x7000000UL) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_SHIFT) & SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_MASK) |
| #define SEI_CTRL_TRG_OUT_CFG_OUT3_SEL_SHIFT (24U) |
| #define SEI_CTRL_TRG_PRD_CFG_ARMING_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_CFG_ARMING_MASK) >> SEI_CTRL_TRG_PRD_CFG_ARMING_SHIFT) |
| #define SEI_CTRL_TRG_PRD_CFG_ARMING_MASK (0x10000UL) |
| #define SEI_CTRL_TRG_PRD_CFG_ARMING_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_PRD_CFG_ARMING_SHIFT) & SEI_CTRL_TRG_PRD_CFG_ARMING_MASK) |
| #define SEI_CTRL_TRG_PRD_CFG_ARMING_SHIFT (16U) |
| #define SEI_CTRL_TRG_PRD_CFG_SYNC_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_CFG_SYNC_MASK) >> SEI_CTRL_TRG_PRD_CFG_SYNC_SHIFT) |
| #define SEI_CTRL_TRG_PRD_CFG_SYNC_MASK (0x1U) |
| #define SEI_CTRL_TRG_PRD_CFG_SYNC_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_PRD_CFG_SYNC_SHIFT) & SEI_CTRL_TRG_PRD_CFG_SYNC_MASK) |
| #define SEI_CTRL_TRG_PRD_CFG_SYNC_SHIFT (0U) |
| #define SEI_CTRL_TRG_PRD_CNT_PERIOD_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_CNT_PERIOD_CNT_MASK) >> SEI_CTRL_TRG_PRD_CNT_PERIOD_CNT_SHIFT) |
| #define SEI_CTRL_TRG_PRD_CNT_PERIOD_CNT_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_TRG_PRD_CNT_PERIOD_CNT_SHIFT (0U) |
| #define SEI_CTRL_TRG_PRD_PERIOD_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_PERIOD_MASK) >> SEI_CTRL_TRG_PRD_PERIOD_SHIFT) |
| #define SEI_CTRL_TRG_PRD_PERIOD_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_TRG_PRD_PERIOD_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_PRD_PERIOD_SHIFT) & SEI_CTRL_TRG_PRD_PERIOD_MASK) |
| #define SEI_CTRL_TRG_PRD_PERIOD_SHIFT (0U) |
| #define SEI_CTRL_TRG_PRD_STS_ARMED_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_STS_ARMED_MASK) >> SEI_CTRL_TRG_PRD_STS_ARMED_SHIFT) |
| #define SEI_CTRL_TRG_PRD_STS_ARMED_MASK (0x10000UL) |
| #define SEI_CTRL_TRG_PRD_STS_ARMED_SHIFT (16U) |
| #define SEI_CTRL_TRG_PRD_STS_TRIGERED_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_PRD_STS_TRIGERED_MASK) >> SEI_CTRL_TRG_PRD_STS_TRIGERED_SHIFT) |
| #define SEI_CTRL_TRG_PRD_STS_TRIGERED_MASK (0x100000UL) |
| #define SEI_CTRL_TRG_PRD_STS_TRIGERED_SHIFT (20U) |
| #define SEI_CTRL_TRG_SW_SOFT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_SW_SOFT_MASK) >> SEI_CTRL_TRG_SW_SOFT_SHIFT) |
| #define SEI_CTRL_TRG_SW_SOFT_MASK (0x1U) |
| #define SEI_CTRL_TRG_SW_SOFT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_SW_SOFT_SHIFT) & SEI_CTRL_TRG_SW_SOFT_MASK) |
| #define SEI_CTRL_TRG_SW_SOFT_SHIFT (0U) |
| #define SEI_CTRL_TRG_TABLE_CMD_0 (0UL) |
| #define SEI_CTRL_TRG_TABLE_CMD_1 (1UL) |
| #define SEI_CTRL_TRG_TABLE_CMD_2 (2UL) |
| #define SEI_CTRL_TRG_TABLE_CMD_3 (3UL) |
| #define SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_MASK) >> SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_SHIFT) |
| #define SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_SHIFT) & SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_MASK) |
| #define SEI_CTRL_TRG_TABLE_CMD_CMD_TRIGGER0_SHIFT (0U) |
| #define SEI_CTRL_TRG_TABLE_TIME_0 (0UL) |
| #define SEI_CTRL_TRG_TABLE_TIME_1 (1UL) |
| #define SEI_CTRL_TRG_TABLE_TIME_2 (2UL) |
| #define SEI_CTRL_TRG_TABLE_TIME_3 (3UL) |
| #define SEI_CTRL_TRG_TABLE_TIME_TRIGGER0_TIME_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_TRG_TABLE_TIME_TRIGGER0_TIME_MASK) >> SEI_CTRL_TRG_TABLE_TIME_TRIGGER0_TIME_SHIFT) |
| #define SEI_CTRL_TRG_TABLE_TIME_TRIGGER0_TIME_MASK (0xFFFFFFFFUL) |
| #define SEI_CTRL_TRG_TABLE_TIME_TRIGGER0_TIME_SHIFT (0U) |
| #define SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_MASK) >> SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_SHIFT) |
| #define SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_MASK (0xFFFFU) |
| #define SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_SHIFT) & SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_MASK) |
| #define SEI_CTRL_XCVR_BAUD_CFG_BAUD_DIV_SHIFT (0U) |
| #define SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_MASK) >> SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_SHIFT) |
| #define SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_MASK (0xFFFF0000UL) |
| #define SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_SHIFT) & SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_MASK) |
| #define SEI_CTRL_XCVR_BAUD_CFG_SYNC_POINT_SHIFT (16U) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_MASK) >> SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SHIFT) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_MASK (0xFFFFU) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SHIFT) & SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_MASK) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SHIFT (0U) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_MASK) >> SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SHIFT) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_MASK (0xFFFF0000UL) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SHIFT) & SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_MASK) |
| #define SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SHIFT (16U) |
| #define SEI_CTRL_XCVR_CTRL_MODE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CTRL_MODE_MASK) >> SEI_CTRL_XCVR_CTRL_MODE_SHIFT) |
| #define SEI_CTRL_XCVR_CTRL_MODE_MASK (0x3U) |
| #define SEI_CTRL_XCVR_CTRL_MODE_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CTRL_MODE_SHIFT) & SEI_CTRL_XCVR_CTRL_MODE_MASK) |
| #define SEI_CTRL_XCVR_CTRL_MODE_SHIFT (0U) |
| #define SEI_CTRL_XCVR_CTRL_PAR_CLR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CTRL_PAR_CLR_MASK) >> SEI_CTRL_XCVR_CTRL_PAR_CLR_SHIFT) |
| #define SEI_CTRL_XCVR_CTRL_PAR_CLR_MASK (0x100U) |
| #define SEI_CTRL_XCVR_CTRL_PAR_CLR_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CTRL_PAR_CLR_SHIFT) & SEI_CTRL_XCVR_CTRL_PAR_CLR_MASK) |
| #define SEI_CTRL_XCVR_CTRL_PAR_CLR_SHIFT (8U) |
| #define SEI_CTRL_XCVR_CTRL_RESTART_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CTRL_RESTART_MASK) >> SEI_CTRL_XCVR_CTRL_RESTART_SHIFT) |
| #define SEI_CTRL_XCVR_CTRL_RESTART_MASK (0x10U) |
| #define SEI_CTRL_XCVR_CTRL_RESTART_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CTRL_RESTART_SHIFT) & SEI_CTRL_XCVR_CTRL_RESTART_MASK) |
| #define SEI_CTRL_XCVR_CTRL_RESTART_SHIFT (4U) |
| #define SEI_CTRL_XCVR_CTRL_TRISMP_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_CTRL_TRISMP_MASK) >> SEI_CTRL_XCVR_CTRL_TRISMP_SHIFT) |
| #define SEI_CTRL_XCVR_CTRL_TRISMP_MASK (0x1000U) |
| #define SEI_CTRL_XCVR_CTRL_TRISMP_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_CTRL_TRISMP_SHIFT) & SEI_CTRL_XCVR_CTRL_TRISMP_MASK) |
| #define SEI_CTRL_XCVR_CTRL_TRISMP_SHIFT (12U) |
| #define SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_MASK) >> SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SHIFT) |
| #define SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_MASK (0xFFFFU) |
| #define SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SHIFT) & SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_MASK) |
| #define SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SHIFT (0U) |
| #define SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_MASK) >> SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SHIFT) |
| #define SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_MASK (0xFFFF0000UL) |
| #define SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SHIFT) & SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_MASK) |
| #define SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SHIFT (16U) |
| #define SEI_CTRL_XCVR_PIN_DI_CK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DI_CK_MASK) >> SEI_CTRL_XCVR_PIN_DI_CK_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DI_CK_MASK (0x2000000UL) |
| #define SEI_CTRL_XCVR_PIN_DI_CK_SHIFT (25U) |
| #define SEI_CTRL_XCVR_PIN_DI_DE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DI_DE_MASK) >> SEI_CTRL_XCVR_PIN_DI_DE_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DI_DE_MASK (0x200U) |
| #define SEI_CTRL_XCVR_PIN_DI_DE_SHIFT (9U) |
| #define SEI_CTRL_XCVR_PIN_DI_RX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DI_RX_MASK) >> SEI_CTRL_XCVR_PIN_DI_RX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DI_RX_MASK (0x20000UL) |
| #define SEI_CTRL_XCVR_PIN_DI_RX_SHIFT (17U) |
| #define SEI_CTRL_XCVR_PIN_DI_TX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DI_TX_MASK) >> SEI_CTRL_XCVR_PIN_DI_TX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DI_TX_MASK (0x2U) |
| #define SEI_CTRL_XCVR_PIN_DI_TX_SHIFT (1U) |
| #define SEI_CTRL_XCVR_PIN_DO_CK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DO_CK_MASK) >> SEI_CTRL_XCVR_PIN_DO_CK_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DO_CK_MASK (0x1000000UL) |
| #define SEI_CTRL_XCVR_PIN_DO_CK_SHIFT (24U) |
| #define SEI_CTRL_XCVR_PIN_DO_DE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DO_DE_MASK) >> SEI_CTRL_XCVR_PIN_DO_DE_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DO_DE_MASK (0x100U) |
| #define SEI_CTRL_XCVR_PIN_DO_DE_SHIFT (8U) |
| #define SEI_CTRL_XCVR_PIN_DO_RX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DO_RX_MASK) >> SEI_CTRL_XCVR_PIN_DO_RX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DO_RX_MASK (0x10000UL) |
| #define SEI_CTRL_XCVR_PIN_DO_RX_SHIFT (16U) |
| #define SEI_CTRL_XCVR_PIN_DO_TX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_DO_TX_MASK) >> SEI_CTRL_XCVR_PIN_DO_TX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_DO_TX_MASK (0x1U) |
| #define SEI_CTRL_XCVR_PIN_DO_TX_SHIFT (0U) |
| #define SEI_CTRL_XCVR_PIN_OE_CK_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_OE_CK_MASK) >> SEI_CTRL_XCVR_PIN_OE_CK_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_OE_CK_MASK (0x4000000UL) |
| #define SEI_CTRL_XCVR_PIN_OE_CK_SHIFT (26U) |
| #define SEI_CTRL_XCVR_PIN_OE_DE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_OE_DE_MASK) >> SEI_CTRL_XCVR_PIN_OE_DE_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_OE_DE_MASK (0x400U) |
| #define SEI_CTRL_XCVR_PIN_OE_DE_SHIFT (10U) |
| #define SEI_CTRL_XCVR_PIN_OE_RX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_OE_RX_MASK) >> SEI_CTRL_XCVR_PIN_OE_RX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_OE_RX_MASK (0x40000UL) |
| #define SEI_CTRL_XCVR_PIN_OE_RX_SHIFT (18U) |
| #define SEI_CTRL_XCVR_PIN_OE_TX_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_PIN_OE_TX_MASK) >> SEI_CTRL_XCVR_PIN_OE_TX_SHIFT) |
| #define SEI_CTRL_XCVR_PIN_OE_TX_MASK (0x4U) |
| #define SEI_CTRL_XCVR_PIN_OE_TX_SHIFT (2U) |
| #define SEI_CTRL_XCVR_STATE_PAR_ERR_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_STATE_PAR_ERR_MASK) >> SEI_CTRL_XCVR_STATE_PAR_ERR_SHIFT) |
| #define SEI_CTRL_XCVR_STATE_PAR_ERR_MASK (0x100U) |
| #define SEI_CTRL_XCVR_STATE_PAR_ERR_SHIFT (8U) |
| #define SEI_CTRL_XCVR_STATE_RECV_STATE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_STATE_RECV_STATE_MASK) >> SEI_CTRL_XCVR_STATE_RECV_STATE_SHIFT) |
| #define SEI_CTRL_XCVR_STATE_RECV_STATE_MASK (0x7000000UL) |
| #define SEI_CTRL_XCVR_STATE_RECV_STATE_SHIFT (24U) |
| #define SEI_CTRL_XCVR_STATE_SEND_STATE_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_STATE_SEND_STATE_MASK) >> SEI_CTRL_XCVR_STATE_SEND_STATE_SHIFT) |
| #define SEI_CTRL_XCVR_STATE_SEND_STATE_MASK (0x70000UL) |
| #define SEI_CTRL_XCVR_STATE_SEND_STATE_SHIFT (16U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_MASK (0x1U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEV_SHIFT (0U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_MASK (0x4U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_CK_IDLEZ_SHIFT (2U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_MASK (0x2U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEV_SHIFT (1U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_MASK (0x8U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DA_IDLEZ_SHIFT (3U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_MASK (0x1F0000UL) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_DATA_LEN_SHIFT (16U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_MASK (0x100U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_EN_SHIFT (8U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_MASK (0x200U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_PAR_POL_SHIFT (9U) |
| #define SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_GET | ( | x | ) | (((uint32_t)(x) & SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_MASK) >> SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_SHIFT) |
| #define SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_MASK (0xFF000000UL) |
| #define SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_SET | ( | x | ) | (((uint32_t)(x) << SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_SHIFT) & SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_MASK) |
| #define SEI_CTRL_XCVR_TYPE_CFG_WAIT_LEN_SHIFT (24U) |
| #define SEI_DAT_0 (0UL) |
| #define SEI_DAT_1 (1UL) |
| #define SEI_DAT_10 (10UL) |
| #define SEI_DAT_11 (11UL) |
| #define SEI_DAT_12 (12UL) |
| #define SEI_DAT_13 (13UL) |
| #define SEI_DAT_14 (14UL) |
| #define SEI_DAT_15 (15UL) |
| #define SEI_DAT_16 (16UL) |
| #define SEI_DAT_17 (17UL) |
| #define SEI_DAT_18 (18UL) |
| #define SEI_DAT_19 (19UL) |
| #define SEI_DAT_2 (2UL) |
| #define SEI_DAT_20 (20UL) |
| #define SEI_DAT_21 (21UL) |
| #define SEI_DAT_22 (22UL) |
| #define SEI_DAT_23 (23UL) |
| #define SEI_DAT_24 (24UL) |
| #define SEI_DAT_25 (25UL) |
| #define SEI_DAT_26 (26UL) |
| #define SEI_DAT_27 (27UL) |
| #define SEI_DAT_28 (28UL) |
| #define SEI_DAT_29 (29UL) |
| #define SEI_DAT_3 (3UL) |
| #define SEI_DAT_30 (30UL) |
| #define SEI_DAT_31 (31UL) |
| #define SEI_DAT_4 (4UL) |
| #define SEI_DAT_5 (5UL) |
| #define SEI_DAT_6 (6UL) |
| #define SEI_DAT_7 (7UL) |
| #define SEI_DAT_8 (8UL) |
| #define SEI_DAT_9 (9UL) |
| #define SEI_DAT_CLR_DATA_CLR_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_CLR_DATA_CLR_MASK) >> SEI_DAT_CLR_DATA_CLR_SHIFT) |
| #define SEI_DAT_CLR_DATA_CLR_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_CLR_DATA_CLR_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_CLR_DATA_CLR_SHIFT) & SEI_DAT_CLR_DATA_CLR_MASK) |
| #define SEI_DAT_CLR_DATA_CLR_SHIFT (0U) |
| #define SEI_DAT_CRCINIT_CRC_INIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_CRCINIT_CRC_INIT_MASK) >> SEI_DAT_CRCINIT_CRC_INIT_SHIFT) |
| #define SEI_DAT_CRCINIT_CRC_INIT_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_CRCINIT_CRC_INIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_CRCINIT_CRC_INIT_SHIFT) & SEI_DAT_CRCINIT_CRC_INIT_MASK) |
| #define SEI_DAT_CRCINIT_CRC_INIT_SHIFT (0U) |
| #define SEI_DAT_CRCPOLY_CRC_POLY_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_CRCPOLY_CRC_POLY_MASK) >> SEI_DAT_CRCPOLY_CRC_POLY_SHIFT) |
| #define SEI_DAT_CRCPOLY_CRC_POLY_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_CRCPOLY_CRC_POLY_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_CRCPOLY_CRC_POLY_SHIFT) & SEI_DAT_CRCPOLY_CRC_POLY_MASK) |
| #define SEI_DAT_CRCPOLY_CRC_POLY_SHIFT (0U) |
| #define SEI_DAT_DATA_DATA_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_DATA_DATA_MASK) >> SEI_DAT_DATA_DATA_SHIFT) |
| #define SEI_DAT_DATA_DATA_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_DATA_DATA_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_DATA_DATA_SHIFT) & SEI_DAT_DATA_DATA_MASK) |
| #define SEI_DAT_DATA_DATA_SHIFT (0U) |
| #define SEI_DAT_GOLD_GOLD_VALUE_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_GOLD_GOLD_VALUE_MASK) >> SEI_DAT_GOLD_GOLD_VALUE_SHIFT) |
| #define SEI_DAT_GOLD_GOLD_VALUE_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_GOLD_GOLD_VALUE_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_GOLD_GOLD_VALUE_SHIFT) & SEI_DAT_GOLD_GOLD_VALUE_MASK) |
| #define SEI_DAT_GOLD_GOLD_VALUE_SHIFT (0U) |
| #define SEI_DAT_IDX_FIRST_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_IDX_FIRST_BIT_MASK) >> SEI_DAT_IDX_FIRST_BIT_SHIFT) |
| #define SEI_DAT_IDX_FIRST_BIT_MASK (0x1F0000UL) |
| #define SEI_DAT_IDX_FIRST_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_IDX_FIRST_BIT_SHIFT) & SEI_DAT_IDX_FIRST_BIT_MASK) |
| #define SEI_DAT_IDX_FIRST_BIT_SHIFT (16U) |
| #define SEI_DAT_IDX_LAST_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_IDX_LAST_BIT_MASK) >> SEI_DAT_IDX_LAST_BIT_SHIFT) |
| #define SEI_DAT_IDX_LAST_BIT_MASK (0x1F000000UL) |
| #define SEI_DAT_IDX_LAST_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_IDX_LAST_BIT_SHIFT) & SEI_DAT_IDX_LAST_BIT_MASK) |
| #define SEI_DAT_IDX_LAST_BIT_SHIFT (24U) |
| #define SEI_DAT_IDX_MAX_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_IDX_MAX_BIT_MASK) >> SEI_DAT_IDX_MAX_BIT_SHIFT) |
| #define SEI_DAT_IDX_MAX_BIT_MASK (0x1F00U) |
| #define SEI_DAT_IDX_MAX_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_IDX_MAX_BIT_SHIFT) & SEI_DAT_IDX_MAX_BIT_MASK) |
| #define SEI_DAT_IDX_MAX_BIT_SHIFT (8U) |
| #define SEI_DAT_IDX_MIN_BIT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_IDX_MIN_BIT_MASK) >> SEI_DAT_IDX_MIN_BIT_SHIFT) |
| #define SEI_DAT_IDX_MIN_BIT_MASK (0x1FU) |
| #define SEI_DAT_IDX_MIN_BIT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_IDX_MIN_BIT_SHIFT) & SEI_DAT_IDX_MIN_BIT_MASK) |
| #define SEI_DAT_IDX_MIN_BIT_SHIFT (0U) |
| #define SEI_DAT_IN_DATA_IN_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_IN_DATA_IN_MASK) >> SEI_DAT_IN_DATA_IN_SHIFT) |
| #define SEI_DAT_IN_DATA_IN_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_IN_DATA_IN_SHIFT (0U) |
| #define SEI_DAT_INV_DATA_INV_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_INV_DATA_INV_MASK) >> SEI_DAT_INV_DATA_INV_SHIFT) |
| #define SEI_DAT_INV_DATA_INV_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_INV_DATA_INV_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_INV_DATA_INV_SHIFT) & SEI_DAT_INV_DATA_INV_MASK) |
| #define SEI_DAT_INV_DATA_INV_SHIFT (0U) |
| #define SEI_DAT_MODE_BORDER_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_BORDER_MASK) >> SEI_DAT_MODE_BORDER_SHIFT) |
| #define SEI_DAT_MODE_BORDER_MASK (0x400U) |
| #define SEI_DAT_MODE_BORDER_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_BORDER_SHIFT) & SEI_DAT_MODE_BORDER_MASK) |
| #define SEI_DAT_MODE_BORDER_SHIFT (10U) |
| #define SEI_DAT_MODE_CRC_INV_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_CRC_INV_MASK) >> SEI_DAT_MODE_CRC_INV_SHIFT) |
| #define SEI_DAT_MODE_CRC_INV_MASK (0x1000U) |
| #define SEI_DAT_MODE_CRC_INV_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_CRC_INV_SHIFT) & SEI_DAT_MODE_CRC_INV_MASK) |
| #define SEI_DAT_MODE_CRC_INV_SHIFT (12U) |
| #define SEI_DAT_MODE_CRC_LEN_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_CRC_LEN_MASK) >> SEI_DAT_MODE_CRC_LEN_SHIFT) |
| #define SEI_DAT_MODE_CRC_LEN_MASK (0x1F000000UL) |
| #define SEI_DAT_MODE_CRC_LEN_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_CRC_LEN_SHIFT) & SEI_DAT_MODE_CRC_LEN_MASK) |
| #define SEI_DAT_MODE_CRC_LEN_SHIFT (24U) |
| #define SEI_DAT_MODE_CRC_SHIFT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_CRC_SHIFT_MASK) >> SEI_DAT_MODE_CRC_SHIFT_SHIFT) |
| #define SEI_DAT_MODE_CRC_SHIFT_MASK (0x2000U) |
| #define SEI_DAT_MODE_CRC_SHIFT_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_CRC_SHIFT_SHIFT) & SEI_DAT_MODE_CRC_SHIFT_MASK) |
| #define SEI_DAT_MODE_CRC_SHIFT_SHIFT (13U) |
| #define SEI_DAT_MODE_MODE_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_MODE_MASK) >> SEI_DAT_MODE_MODE_SHIFT) |
| #define SEI_DAT_MODE_MODE_MASK (0x3U) |
| #define SEI_DAT_MODE_MODE_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_MODE_SHIFT) & SEI_DAT_MODE_MODE_MASK) |
| #define SEI_DAT_MODE_MODE_SHIFT (0U) |
| #define SEI_DAT_MODE_REWIND_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_REWIND_MASK) >> SEI_DAT_MODE_REWIND_SHIFT) |
| #define SEI_DAT_MODE_REWIND_MASK (0x100U) |
| #define SEI_DAT_MODE_REWIND_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_REWIND_SHIFT) & SEI_DAT_MODE_REWIND_MASK) |
| #define SEI_DAT_MODE_REWIND_SHIFT (8U) |
| #define SEI_DAT_MODE_SIGNED_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_SIGNED_MASK) >> SEI_DAT_MODE_SIGNED_SHIFT) |
| #define SEI_DAT_MODE_SIGNED_MASK (0x200U) |
| #define SEI_DAT_MODE_SIGNED_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_SIGNED_SHIFT) & SEI_DAT_MODE_SIGNED_MASK) |
| #define SEI_DAT_MODE_SIGNED_SHIFT (9U) |
| #define SEI_DAT_MODE_WLEN_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_WLEN_MASK) >> SEI_DAT_MODE_WLEN_SHIFT) |
| #define SEI_DAT_MODE_WLEN_MASK (0x1F0000UL) |
| #define SEI_DAT_MODE_WLEN_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_WLEN_SHIFT) & SEI_DAT_MODE_WLEN_MASK) |
| #define SEI_DAT_MODE_WLEN_SHIFT (16U) |
| #define SEI_DAT_MODE_WORDER_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_MODE_WORDER_MASK) >> SEI_DAT_MODE_WORDER_SHIFT) |
| #define SEI_DAT_MODE_WORDER_MASK (0x800U) |
| #define SEI_DAT_MODE_WORDER_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_MODE_WORDER_SHIFT) & SEI_DAT_MODE_WORDER_MASK) |
| #define SEI_DAT_MODE_WORDER_SHIFT (11U) |
| #define SEI_DAT_OUT_DATA_OUT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_OUT_DATA_OUT_MASK) >> SEI_DAT_OUT_DATA_OUT_SHIFT) |
| #define SEI_DAT_OUT_DATA_OUT_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_OUT_DATA_OUT_SHIFT (0U) |
| #define SEI_DAT_SET_DATA_SET_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_SET_DATA_SET_MASK) >> SEI_DAT_SET_DATA_SET_SHIFT) |
| #define SEI_DAT_SET_DATA_SET_MASK (0xFFFFFFFFUL) |
| #define SEI_DAT_SET_DATA_SET_SET | ( | x | ) | (((uint32_t)(x) << SEI_DAT_SET_DATA_SET_SHIFT) & SEI_DAT_SET_DATA_SET_MASK) |
| #define SEI_DAT_SET_DATA_SET_SHIFT (0U) |
| #define SEI_DAT_STS_BIT_IDX_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_STS_BIT_IDX_MASK) >> SEI_DAT_STS_BIT_IDX_SHIFT) |
| #define SEI_DAT_STS_BIT_IDX_MASK (0x1FU) |
| #define SEI_DAT_STS_BIT_IDX_SHIFT (0U) |
| #define SEI_DAT_STS_CRC_IDX_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_STS_CRC_IDX_MASK) >> SEI_DAT_STS_CRC_IDX_SHIFT) |
| #define SEI_DAT_STS_CRC_IDX_MASK (0x1F000000UL) |
| #define SEI_DAT_STS_CRC_IDX_SHIFT (24U) |
| #define SEI_DAT_STS_WORD_CNT_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_STS_WORD_CNT_MASK) >> SEI_DAT_STS_WORD_CNT_SHIFT) |
| #define SEI_DAT_STS_WORD_CNT_MASK (0x1F00U) |
| #define SEI_DAT_STS_WORD_CNT_SHIFT (8U) |
| #define SEI_DAT_STS_WORD_IDX_GET | ( | x | ) | (((uint32_t)(x) & SEI_DAT_STS_WORD_IDX_MASK) >> SEI_DAT_STS_WORD_IDX_SHIFT) |
| #define SEI_DAT_STS_WORD_IDX_MASK (0x1F0000UL) |
| #define SEI_DAT_STS_WORD_IDX_SHIFT (16U) |
| #define SEI_INSTR_0 (0UL) |
| #define SEI_INSTR_1 (1UL) |
| #define SEI_INSTR_10 (10UL) |
| #define SEI_INSTR_100 (100UL) |
| #define SEI_INSTR_101 (101UL) |
| #define SEI_INSTR_102 (102UL) |
| #define SEI_INSTR_103 (103UL) |
| #define SEI_INSTR_104 (104UL) |
| #define SEI_INSTR_105 (105UL) |
| #define SEI_INSTR_106 (106UL) |
| #define SEI_INSTR_107 (107UL) |
| #define SEI_INSTR_108 (108UL) |
| #define SEI_INSTR_109 (109UL) |
| #define SEI_INSTR_11 (11UL) |
| #define SEI_INSTR_110 (110UL) |
| #define SEI_INSTR_111 (111UL) |
| #define SEI_INSTR_112 (112UL) |
| #define SEI_INSTR_113 (113UL) |
| #define SEI_INSTR_114 (114UL) |
| #define SEI_INSTR_115 (115UL) |
| #define SEI_INSTR_116 (116UL) |
| #define SEI_INSTR_117 (117UL) |
| #define SEI_INSTR_118 (118UL) |
| #define SEI_INSTR_119 (119UL) |
| #define SEI_INSTR_12 (12UL) |
| #define SEI_INSTR_120 (120UL) |
| #define SEI_INSTR_121 (121UL) |
| #define SEI_INSTR_122 (122UL) |
| #define SEI_INSTR_123 (123UL) |
| #define SEI_INSTR_124 (124UL) |
| #define SEI_INSTR_125 (125UL) |
| #define SEI_INSTR_126 (126UL) |
| #define SEI_INSTR_127 (127UL) |
| #define SEI_INSTR_128 (128UL) |
| #define SEI_INSTR_129 (129UL) |
| #define SEI_INSTR_13 (13UL) |
| #define SEI_INSTR_130 (130UL) |
| #define SEI_INSTR_131 (131UL) |
| #define SEI_INSTR_132 (132UL) |
| #define SEI_INSTR_133 (133UL) |
| #define SEI_INSTR_134 (134UL) |
| #define SEI_INSTR_135 (135UL) |
| #define SEI_INSTR_136 (136UL) |
| #define SEI_INSTR_137 (137UL) |
| #define SEI_INSTR_138 (138UL) |
| #define SEI_INSTR_139 (139UL) |
| #define SEI_INSTR_14 (14UL) |
| #define SEI_INSTR_140 (140UL) |
| #define SEI_INSTR_141 (141UL) |
| #define SEI_INSTR_142 (142UL) |
| #define SEI_INSTR_143 (143UL) |
| #define SEI_INSTR_144 (144UL) |
| #define SEI_INSTR_145 (145UL) |
| #define SEI_INSTR_146 (146UL) |
| #define SEI_INSTR_147 (147UL) |
| #define SEI_INSTR_148 (148UL) |
| #define SEI_INSTR_149 (149UL) |
| #define SEI_INSTR_15 (15UL) |
| #define SEI_INSTR_150 (150UL) |
| #define SEI_INSTR_151 (151UL) |
| #define SEI_INSTR_152 (152UL) |
| #define SEI_INSTR_153 (153UL) |
| #define SEI_INSTR_154 (154UL) |
| #define SEI_INSTR_155 (155UL) |
| #define SEI_INSTR_156 (156UL) |
| #define SEI_INSTR_157 (157UL) |
| #define SEI_INSTR_158 (158UL) |
| #define SEI_INSTR_159 (159UL) |
| #define SEI_INSTR_16 (16UL) |
| #define SEI_INSTR_160 (160UL) |
| #define SEI_INSTR_161 (161UL) |
| #define SEI_INSTR_162 (162UL) |
| #define SEI_INSTR_163 (163UL) |
| #define SEI_INSTR_164 (164UL) |
| #define SEI_INSTR_165 (165UL) |
| #define SEI_INSTR_166 (166UL) |
| #define SEI_INSTR_167 (167UL) |
| #define SEI_INSTR_168 (168UL) |
| #define SEI_INSTR_169 (169UL) |
| #define SEI_INSTR_17 (17UL) |
| #define SEI_INSTR_170 (170UL) |
| #define SEI_INSTR_171 (171UL) |
| #define SEI_INSTR_172 (172UL) |
| #define SEI_INSTR_173 (173UL) |
| #define SEI_INSTR_174 (174UL) |
| #define SEI_INSTR_175 (175UL) |
| #define SEI_INSTR_176 (176UL) |
| #define SEI_INSTR_177 (177UL) |
| #define SEI_INSTR_178 (178UL) |
| #define SEI_INSTR_179 (179UL) |
| #define SEI_INSTR_18 (18UL) |
| #define SEI_INSTR_180 (180UL) |
| #define SEI_INSTR_181 (181UL) |
| #define SEI_INSTR_182 (182UL) |
| #define SEI_INSTR_183 (183UL) |
| #define SEI_INSTR_184 (184UL) |
| #define SEI_INSTR_185 (185UL) |
| #define SEI_INSTR_186 (186UL) |
| #define SEI_INSTR_187 (187UL) |
| #define SEI_INSTR_188 (188UL) |
| #define SEI_INSTR_189 (189UL) |
| #define SEI_INSTR_19 (19UL) |
| #define SEI_INSTR_190 (190UL) |
| #define SEI_INSTR_191 (191UL) |
| #define SEI_INSTR_192 (192UL) |
| #define SEI_INSTR_193 (193UL) |
| #define SEI_INSTR_194 (194UL) |
| #define SEI_INSTR_195 (195UL) |
| #define SEI_INSTR_196 (196UL) |
| #define SEI_INSTR_197 (197UL) |
| #define SEI_INSTR_198 (198UL) |
| #define SEI_INSTR_199 (199UL) |
| #define SEI_INSTR_2 (2UL) |
| #define SEI_INSTR_20 (20UL) |
| #define SEI_INSTR_200 (200UL) |
| #define SEI_INSTR_201 (201UL) |
| #define SEI_INSTR_202 (202UL) |
| #define SEI_INSTR_203 (203UL) |
| #define SEI_INSTR_204 (204UL) |
| #define SEI_INSTR_205 (205UL) |
| #define SEI_INSTR_206 (206UL) |
| #define SEI_INSTR_207 (207UL) |
| #define SEI_INSTR_208 (208UL) |
| #define SEI_INSTR_209 (209UL) |
| #define SEI_INSTR_21 (21UL) |
| #define SEI_INSTR_210 (210UL) |
| #define SEI_INSTR_211 (211UL) |
| #define SEI_INSTR_212 (212UL) |
| #define SEI_INSTR_213 (213UL) |
| #define SEI_INSTR_214 (214UL) |
| #define SEI_INSTR_215 (215UL) |
| #define SEI_INSTR_216 (216UL) |
| #define SEI_INSTR_217 (217UL) |
| #define SEI_INSTR_218 (218UL) |
| #define SEI_INSTR_219 (219UL) |
| #define SEI_INSTR_22 (22UL) |
| #define SEI_INSTR_220 (220UL) |
| #define SEI_INSTR_221 (221UL) |
| #define SEI_INSTR_222 (222UL) |
| #define SEI_INSTR_223 (223UL) |
| #define SEI_INSTR_224 (224UL) |
| #define SEI_INSTR_225 (225UL) |
| #define SEI_INSTR_226 (226UL) |
| #define SEI_INSTR_227 (227UL) |
| #define SEI_INSTR_228 (228UL) |
| #define SEI_INSTR_229 (229UL) |
| #define SEI_INSTR_23 (23UL) |
| #define SEI_INSTR_230 (230UL) |
| #define SEI_INSTR_231 (231UL) |
| #define SEI_INSTR_232 (232UL) |
| #define SEI_INSTR_233 (233UL) |
| #define SEI_INSTR_234 (234UL) |
| #define SEI_INSTR_235 (235UL) |
| #define SEI_INSTR_236 (236UL) |
| #define SEI_INSTR_237 (237UL) |
| #define SEI_INSTR_238 (238UL) |
| #define SEI_INSTR_239 (239UL) |
| #define SEI_INSTR_24 (24UL) |
| #define SEI_INSTR_240 (240UL) |
| #define SEI_INSTR_241 (241UL) |
| #define SEI_INSTR_242 (242UL) |
| #define SEI_INSTR_243 (243UL) |
| #define SEI_INSTR_244 (244UL) |
| #define SEI_INSTR_245 (245UL) |
| #define SEI_INSTR_246 (246UL) |
| #define SEI_INSTR_247 (247UL) |
| #define SEI_INSTR_248 (248UL) |
| #define SEI_INSTR_249 (249UL) |
| #define SEI_INSTR_25 (25UL) |
| #define SEI_INSTR_250 (250UL) |
| #define SEI_INSTR_251 (251UL) |
| #define SEI_INSTR_252 (252UL) |
| #define SEI_INSTR_253 (253UL) |
| #define SEI_INSTR_254 (254UL) |
| #define SEI_INSTR_255 (255UL) |
| #define SEI_INSTR_26 (26UL) |
| #define SEI_INSTR_27 (27UL) |
| #define SEI_INSTR_28 (28UL) |
| #define SEI_INSTR_29 (29UL) |
| #define SEI_INSTR_3 (3UL) |
| #define SEI_INSTR_30 (30UL) |
| #define SEI_INSTR_31 (31UL) |
| #define SEI_INSTR_32 (32UL) |
| #define SEI_INSTR_33 (33UL) |
| #define SEI_INSTR_34 (34UL) |
| #define SEI_INSTR_35 (35UL) |
| #define SEI_INSTR_36 (36UL) |
| #define SEI_INSTR_37 (37UL) |
| #define SEI_INSTR_38 (38UL) |
| #define SEI_INSTR_39 (39UL) |
| #define SEI_INSTR_4 (4UL) |
| #define SEI_INSTR_40 (40UL) |
| #define SEI_INSTR_41 (41UL) |
| #define SEI_INSTR_42 (42UL) |
| #define SEI_INSTR_43 (43UL) |
| #define SEI_INSTR_44 (44UL) |
| #define SEI_INSTR_45 (45UL) |
| #define SEI_INSTR_46 (46UL) |
| #define SEI_INSTR_47 (47UL) |
| #define SEI_INSTR_48 (48UL) |
| #define SEI_INSTR_49 (49UL) |
| #define SEI_INSTR_5 (5UL) |
| #define SEI_INSTR_50 (50UL) |
| #define SEI_INSTR_51 (51UL) |
| #define SEI_INSTR_52 (52UL) |
| #define SEI_INSTR_53 (53UL) |
| #define SEI_INSTR_54 (54UL) |
| #define SEI_INSTR_55 (55UL) |
| #define SEI_INSTR_56 (56UL) |
| #define SEI_INSTR_57 (57UL) |
| #define SEI_INSTR_58 (58UL) |
| #define SEI_INSTR_59 (59UL) |
| #define SEI_INSTR_6 (6UL) |
| #define SEI_INSTR_60 (60UL) |
| #define SEI_INSTR_61 (61UL) |
| #define SEI_INSTR_62 (62UL) |
| #define SEI_INSTR_63 (63UL) |
| #define SEI_INSTR_64 (64UL) |
| #define SEI_INSTR_65 (65UL) |
| #define SEI_INSTR_66 (66UL) |
| #define SEI_INSTR_67 (67UL) |
| #define SEI_INSTR_68 (68UL) |
| #define SEI_INSTR_69 (69UL) |
| #define SEI_INSTR_7 (7UL) |
| #define SEI_INSTR_70 (70UL) |
| #define SEI_INSTR_71 (71UL) |
| #define SEI_INSTR_72 (72UL) |
| #define SEI_INSTR_73 (73UL) |
| #define SEI_INSTR_74 (74UL) |
| #define SEI_INSTR_75 (75UL) |
| #define SEI_INSTR_76 (76UL) |
| #define SEI_INSTR_77 (77UL) |
| #define SEI_INSTR_78 (78UL) |
| #define SEI_INSTR_79 (79UL) |
| #define SEI_INSTR_8 (8UL) |
| #define SEI_INSTR_80 (80UL) |
| #define SEI_INSTR_81 (81UL) |
| #define SEI_INSTR_82 (82UL) |
| #define SEI_INSTR_83 (83UL) |
| #define SEI_INSTR_84 (84UL) |
| #define SEI_INSTR_85 (85UL) |
| #define SEI_INSTR_86 (86UL) |
| #define SEI_INSTR_87 (87UL) |
| #define SEI_INSTR_88 (88UL) |
| #define SEI_INSTR_89 (89UL) |
| #define SEI_INSTR_9 (9UL) |
| #define SEI_INSTR_90 (90UL) |
| #define SEI_INSTR_91 (91UL) |
| #define SEI_INSTR_92 (92UL) |
| #define SEI_INSTR_93 (93UL) |
| #define SEI_INSTR_94 (94UL) |
| #define SEI_INSTR_95 (95UL) |
| #define SEI_INSTR_96 (96UL) |
| #define SEI_INSTR_97 (97UL) |
| #define SEI_INSTR_98 (98UL) |
| #define SEI_INSTR_99 (99UL) |
| #define SEI_INSTR_CK_GET | ( | x | ) | (((uint32_t)(x) & SEI_INSTR_CK_MASK) >> SEI_INSTR_CK_SHIFT) |
| #define SEI_INSTR_CK_MASK (0x3000000UL) |
| #define SEI_INSTR_CK_SET | ( | x | ) | (((uint32_t)(x) << SEI_INSTR_CK_SHIFT) & SEI_INSTR_CK_MASK) |
| #define SEI_INSTR_CK_SHIFT (24U) |
| #define SEI_INSTR_CRC_GET | ( | x | ) | (((uint32_t)(x) & SEI_INSTR_CRC_MASK) >> SEI_INSTR_CRC_SHIFT) |
| #define SEI_INSTR_CRC_MASK (0x1F0000UL) |
| #define SEI_INSTR_CRC_SET | ( | x | ) | (((uint32_t)(x) << SEI_INSTR_CRC_SHIFT) & SEI_INSTR_CRC_MASK) |
| #define SEI_INSTR_CRC_SHIFT (16U) |
| #define SEI_INSTR_DAT_GET | ( | x | ) | (((uint32_t)(x) & SEI_INSTR_DAT_MASK) >> SEI_INSTR_DAT_SHIFT) |
| #define SEI_INSTR_DAT_MASK (0x1F00U) |
| #define SEI_INSTR_DAT_SET | ( | x | ) | (((uint32_t)(x) << SEI_INSTR_DAT_SHIFT) & SEI_INSTR_DAT_MASK) |
| #define SEI_INSTR_DAT_SHIFT (8U) |
| #define SEI_INSTR_OP_GET | ( | x | ) | (((uint32_t)(x) & SEI_INSTR_OP_MASK) >> SEI_INSTR_OP_SHIFT) |
| #define SEI_INSTR_OP_MASK (0x1C000000UL) |
| #define SEI_INSTR_OP_SET | ( | x | ) | (((uint32_t)(x) << SEI_INSTR_OP_SHIFT) & SEI_INSTR_OP_MASK) |
| #define SEI_INSTR_OP_SHIFT (26U) |
| #define SEI_INSTR_OPR_GET | ( | x | ) | (((uint32_t)(x) & SEI_INSTR_OPR_MASK) >> SEI_INSTR_OPR_SHIFT) |
| #define SEI_INSTR_OPR_MASK (0x1FU) |
| #define SEI_INSTR_OPR_SET | ( | x | ) | (((uint32_t)(x) << SEI_INSTR_OPR_SHIFT) & SEI_INSTR_OPR_MASK) |
| #define SEI_INSTR_OPR_SHIFT (0U) |
| #define SEI_LATCH_0 (0UL) |
| #define SEI_LATCH_1 (1UL) |
| #define SEI_LATCH_2 (2UL) |
| #define SEI_LATCH_3 (3UL) |