HPM SDK
HPMicro Software Development Kit
INTERRUPT driver APIs

INTERRUPT driver APIs. More...

Macros

#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define intc_s_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_set_s_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)
 
#define intc_s_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_S_MODE)
 
#define intc_s_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define ENTER_NESTED_IRQ_HANDLING_S()
 
#define COMPLETE_IRQ_HANDLING_S(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_S()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define ISR_NAME_S(irq_num)   default_isr_s_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_EXT_ISR_S(irq_num, isr)
 Declare an external interrupt handler for supervisor mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define SDK_DECLARE_MCHTMR_ISR_S(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR_S(isr)
 Declare machine software interrupt handler. More...
 
#define CSR_MSTATUS_MPP_S_MODE   (0x1)
 
#define MODE_SWITCH_FROM_M(mstatus, mepc, label, mode)
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define intc_s_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_set_s_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)
 
#define intc_s_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_S_MODE)
 
#define intc_s_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define ENTER_NESTED_IRQ_HANDLING_S()
 
#define COMPLETE_IRQ_HANDLING_S(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_S()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define ISR_NAME_S(irq_num)   default_isr_s_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_EXT_ISR_S(irq_num, isr)
 Declare an external interrupt handler for supervisor mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define SDK_DECLARE_MCHTMR_ISR_S(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR_S(isr)
 Declare machine software interrupt handler. More...
 
#define CSR_MSTATUS_MPP_S_MODE   (0x1)
 
#define MODE_SWITCH_FROM_M(mstatus, mepc, label, mode)
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define intc_s_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_set_s_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)
 
#define intc_s_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_S_MODE)
 
#define intc_s_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define ENTER_NESTED_IRQ_HANDLING_S()
 
#define COMPLETE_IRQ_HANDLING_S(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_S()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define ISR_NAME_S(irq_num)   default_isr_s_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_EXT_ISR_S(irq_num, isr)
 Declare an external interrupt handler for supervisor mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define SDK_DECLARE_MCHTMR_ISR_S(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR_S(isr)
 Declare machine software interrupt handler. More...
 
#define CSR_MSTATUS_MPP_S_MODE   (0x1)
 
#define MODE_SWITCH_FROM_M(mstatus, mepc, label, mode)
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define intc_s_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_set_s_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)
 
#define intc_s_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_S_MODE)
 
#define intc_s_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define ENTER_NESTED_IRQ_HANDLING_S()
 
#define COMPLETE_IRQ_HANDLING_S(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_S()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define ISR_NAME_S(irq_num)   default_isr_s_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_EXT_ISR_S(irq_num, isr)
 Declare an external interrupt handler for supervisor mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define SDK_DECLARE_MCHTMR_ISR_S(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR_S(isr)
 Declare machine software interrupt handler. More...
 
#define CSR_MSTATUS_MPP_S_MODE   (0x1)
 
#define MODE_SWITCH_FROM_M(mstatus, mepc, label, mode)
 
#define M_MODE   0
 
#define S_MODE   1
 
#define PLICSWI   1
 
#define intc_m_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_set_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)
 
#define intc_m_get_threshold()    intc_get_threshold(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)
 
#define intc_m_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_M_MODE)
 
#define intc_m_enable_irq_with_priority(irq, priority)
 
#define intc_s_enable_irq(irq)    intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_disable_irq(irq)    intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_set_s_threshold(threshold)    intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)
 
#define intc_s_complete_irq(irq)    intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)
 
#define intc_s_claim_irq()   intc_claim_irq(HPM_PLIC_TARGET_S_MODE)
 
#define intc_s_enable_irq_with_priority(irq, priority)
 
#define SAVE_CSR(r)   register long __##r = read_csr(r);
 
#define RESTORE_CSR(r)   write_csr(r, __##r);
 
#define SAVE_MXSTATUS()
 
#define RESTORE_MXSTATUS()
 
#define SAVE_FCSR()
 
#define RESTORE_FCSR()
 
#define SAVE_UCODE()
 
#define RESTORE_UCODE()
 
#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)
 
#define SAVE_FPU_CONTEXT()
 
#define RESTORE_FPU_CONTEXT()
 
#define SAVE_CALLER_CONTEXT()
 Save the caller registers based on the RISC-V ABI specification. More...
 
#define RESTORE_CALLER_CONTEXT()
 Restore the caller registers based on the RISC-V ABI specification. More...
 
#define SAVE_FPU_STATE()
 
#define RESTORE_FPU_STATE()
 
#define SAVE_DSP_CONTEXT()
 
#define RESTORE_DSP_CONTEXT()
 
#define SAVE_MCCTL_CONTEXT()
 
#define RESTORE_MCCTL_CONTEXT()
 
#define ENTER_NESTED_IRQ_HANDLING_M()
 
#define COMPLETE_IRQ_HANDLING_M(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_M()
 
#define ENTER_NESTED_IRQ_HANDLING_S()
 
#define COMPLETE_IRQ_HANDLING_S(irq_num)
 
#define EXIT_NESTED_IRQ_HANDLING_S()
 
#define NESTED_IRQ_ENTER()
 
#define NESTED_IRQ_EXIT()
 
#define HPM_EXTERN_C
 
#define ISR_NAME_M(irq_num)   default_isr_##irq_num
 
#define ISR_NAME_S(irq_num)   default_isr_s_##irq_num
 
#define SDK_DECLARE_EXT_ISR_M(irq_num, isr)
 Declare an external interrupt handler for machine mode. More...
 
#define SDK_DECLARE_EXT_ISR_S(irq_num, isr)
 Declare an external interrupt handler for supervisor mode. More...
 
#define SDK_DECLARE_MCHTMR_ISR(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR(isr)
 Declare machine software interrupt handler. More...
 
#define SDK_DECLARE_MCHTMR_ISR_S(isr)
 Declare machine timer interrupt handler. More...
 
#define SDK_DECLARE_SWI_ISR_S(isr)
 Declare machine software interrupt handler. More...
 
#define CSR_MSTATUS_MPP_S_MODE   (0x1)
 
#define MODE_SWITCH_FROM_M(mstatus, mepc, label, mode)
 

Typedefs

typedef void(* s_mode_entry) (void)
 
typedef void(* s_mode_entry) (void)
 
typedef void(* s_mode_entry) (void)
 
typedef void(* s_mode_entry) (void)
 
typedef void(* s_mode_entry) (void)
 

Functions

static ATTR_ALWAYS_INLINE void enable_global_irq (uint32_t mask)
 Enable global IRQ with mask. More...
 
static ATTR_ALWAYS_INLINE uint32_t disable_global_irq (uint32_t mask)
 Disable global IRQ with mask and return mstatus. More...
 
static ATTR_ALWAYS_INLINE void restore_global_irq (uint32_t mask)
 Restore global IRQ with mask. More...
 
static ATTR_ALWAYS_INLINE void enable_irq_from_intc (void)
 Enable IRQ from interrupt controller. More...
 
static ATTR_ALWAYS_INLINE void disable_irq_from_intc (void)
 Disable IRQ from interrupt controller. More...
 
static ATTR_ALWAYS_INLINE void enable_mchtmr_irq (void)
 Enable machine timer IRQ. More...
 
static ATTR_ALWAYS_INLINE void disable_mchtmr_irq (void)
 Disable machine timer IRQ. More...
 
static ATTR_ALWAYS_INLINE void intc_m_init_swi (void)
 Initialize software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_m_enable_swi (void)
 Enable software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_m_disable_swi (void)
 Disable software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_m_trigger_swi (void)
 Trigger software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_m_claim_swi (void)
 Claim software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_m_complete_swi (void)
 Complete software interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_enable_irq (uint32_t target, uint32_t irq)
 
static ATTR_ALWAYS_INLINE void intc_set_irq_priority (uint32_t irq, uint32_t priority)
 Set interrupt priority. More...
 
static ATTR_ALWAYS_INLINE void intc_disable_irq (uint32_t target, uint32_t irq)
 Disable specific interrupt. More...
 
static ATTR_ALWAYS_INLINE void intc_set_threshold (uint32_t target, uint32_t threshold)
 Set interrupt threshold. More...
 
static ATTR_ALWAYS_INLINE uint32_t intc_get_threshold (uint32_t target)
 Get interrupt threshold. More...
 
static ATTR_ALWAYS_INLINE uint32_t intc_claim_irq (uint32_t target)
 Claim IRQ. More...
 
static ATTR_ALWAYS_INLINE void intc_complete_irq (uint32_t target, uint32_t irq)
 Complete IRQ. More...
 
void default_irq_entry (void)
 
static ATTR_ALWAYS_INLINE void install_isr (uint32_t irq, uint32_t isr)
 Install ISR for certain IRQ for ram based vector table. More...
 
static ATTR_ALWAYS_INLINE void uninstall_isr (uint32_t irq)
 Uninstall ISR for certain IRQ for ram based vector table. More...
 
static ATTR_ALWAYS_INLINE void delegate_irq (uint32_t mask)
 Delegate IRQ handling. More...
 
static ATTR_ALWAYS_INLINE void undelegate_irq (uint32_t mask)
 Undelegate IRQ handling. More...
 
static ATTR_ALWAYS_INLINE void enable_s_global_irq (uint32_t mask)
 Enable global IRQ with mask for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE uint32_t disable_s_global_irq (uint32_t mask)
 Disable global IRQ with mask and return sstatus for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void restore_s_global_irq (uint32_t mask)
 Restore global IRQ with mask for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void disable_s_irq_from_intc (void)
 Disable IRQ from interrupt controller for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void enable_s_irq_from_intc (void)
 Enable IRQ from interrupt controller for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void enable_s_mchtmr_irq (void)
 Enable machine timer IRQ for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void disable_s_mchtmr_irq (void)
 Disable machine timer IRQ. More...
 
static ATTR_ALWAYS_INLINE void intc_s_enable_swi (void)
 Enable software interrupt for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void intc_s_disable_swi (void)
 Disable software interrupt for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void intc_s_trigger_swi (void)
 Trigger software interrupt for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void intc_s_complete_swi (void)
 Complete software interrupt for supervisor mode. More...
 
void default_s_irq_entry (void)
 
static ATTR_ALWAYS_INLINE void install_s_isr (uint32_t irq, uint32_t isr)
 Install ISR for certain IRQ for ram based vector table for supervisor mode. More...
 
static ATTR_ALWAYS_INLINE void uninstall_s_isr (uint32_t irq)
 Uninstall ISR for certain IRQ for ram based vector table for supervisor mode. More...
 
static void switch_to_s_mode (s_mode_entry entry)
 Switch mode to supervisor from machine. More...
 

Detailed Description

INTERRUPT driver APIs.

Macro Definition Documentation

◆ COMPLETE_IRQ_HANDLING_M [1/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [2/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [3/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [4/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [5/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [6/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [7/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_M [8/8]

#define COMPLETE_IRQ_HANDLING_M (   irq_num)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrci mstatus, 8"); \
__asm volatile("lui a4, 0xe4200"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_S [1/5]

#define COMPLETE_IRQ_HANDLING_S (   irq_num)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{\
__asm volatile("csrci sstatus, 2"); \
__asm volatile("lui a4, 0xe4201"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_S [2/5]

#define COMPLETE_IRQ_HANDLING_S (   irq_num)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{\
__asm volatile("csrci sstatus, 2"); \
__asm volatile("lui a4, 0xe4201"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_S [3/5]

#define COMPLETE_IRQ_HANDLING_S (   irq_num)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{\
__asm volatile("csrci sstatus, 2"); \
__asm volatile("lui a4, 0xe4201"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_S [4/5]

#define COMPLETE_IRQ_HANDLING_S (   irq_num)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{\
__asm volatile("csrci sstatus, 2"); \
__asm volatile("lui a4, 0xe4201"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ COMPLETE_IRQ_HANDLING_S [5/5]

#define COMPLETE_IRQ_HANDLING_S (   irq_num)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{\
__asm volatile("csrci sstatus, 2"); \
__asm volatile("lui a4, 0xe4201"); \
__asm volatile("li a3, %0" : : "i" (irq_num) :); \
__asm volatile("sw a3, 4(a4)"); \
}

◆ CONTEXT_REG_NUM [1/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [2/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [3/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [4/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [5/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [6/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [7/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CONTEXT_REG_NUM [8/8]

#define CONTEXT_REG_NUM   HPM_ALIGN_UP((4 * 22), 16)

◆ CSR_MSTATUS_MPP_S_MODE [1/5]

#define CSR_MSTATUS_MPP_S_MODE   (0x1)

◆ CSR_MSTATUS_MPP_S_MODE [2/5]

#define CSR_MSTATUS_MPP_S_MODE   (0x1)

◆ CSR_MSTATUS_MPP_S_MODE [3/5]

#define CSR_MSTATUS_MPP_S_MODE   (0x1)

◆ CSR_MSTATUS_MPP_S_MODE [4/5]

#define CSR_MSTATUS_MPP_S_MODE   (0x1)

◆ CSR_MSTATUS_MPP_S_MODE [5/5]

#define CSR_MSTATUS_MPP_S_MODE   (0x1)

◆ ENTER_NESTED_IRQ_HANDLING_M [1/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [2/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [3/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [4/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [5/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [6/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [7/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_M [8/8]

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrr s2, mepc \n\ csrr s3, mstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
SAVE_MCCTL_CONTEXT(); \
__asm volatile("csrsi mstatus, 8"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_S [1/5]

#define ENTER_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{\
__asm volatile("\n\ csrr s2, sepc \n\ csrr s3, sstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
__asm volatile("csrsi sstatus, 2"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_S [2/5]

#define ENTER_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{\
__asm volatile("\n\ csrr s2, sepc \n\ csrr s3, sstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
__asm volatile("csrsi sstatus, 2"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_S [3/5]

#define ENTER_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{\
__asm volatile("\n\ csrr s2, sepc \n\ csrr s3, sstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
__asm volatile("csrsi sstatus, 2"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_S [4/5]

#define ENTER_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{\
__asm volatile("\n\ csrr s2, sepc \n\ csrr s3, sstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
__asm volatile("csrsi sstatus, 2"); \
}

◆ ENTER_NESTED_IRQ_HANDLING_S [5/5]

#define ENTER_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{\
__asm volatile("\n\ csrr s2, sepc \n\ csrr s3, sstatus \n");\
SAVE_FPU_STATE(); \
SAVE_DSP_CONTEXT(); \
__asm volatile("csrsi sstatus, 2"); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [1/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [2/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [3/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [4/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [5/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [6/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [7/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M [8/8]

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw mstatus, s3 \n\ csrw mepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S [1/5]

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw sstatus, s3 \n\ csrw sepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S [2/5]

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw sstatus, s3 \n\ csrw sepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S [3/5]

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw sstatus, s3 \n\ csrw sepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S [4/5]

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw sstatus, s3 \n\ csrw sepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S [5/5]

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ csrw sstatus, s3 \n\ csrw sepc, s2 \n");\
RESTORE_FPU_STATE(); \
RESTORE_DSP_CONTEXT(); \
}

◆ HPM_EXTERN_C [1/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [2/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [3/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [4/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [5/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [6/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [7/8]

#define HPM_EXTERN_C

◆ HPM_EXTERN_C [8/8]

#define HPM_EXTERN_C

◆ intc_m_claim_irq [1/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [2/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [3/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [4/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [5/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [6/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [7/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_claim_irq [8/8]

#define intc_m_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_complete_irq [1/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [2/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [3/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [4/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [5/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [6/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [7/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_complete_irq [8/8]

#define intc_m_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [1/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [2/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [3/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [4/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [5/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [6/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [7/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_disable_irq [8/8]

#define intc_m_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [1/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [2/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [3/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [4/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [5/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [6/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [7/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq [8/8]

#define intc_m_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

◆ intc_m_enable_irq_with_priority [1/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [2/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [3/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [4/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [5/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [6/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [7/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_enable_irq_with_priority [8/8]

#define intc_m_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_m_enable_irq(irq); \
} while (0)

◆ intc_m_get_threshold [1/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [2/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [3/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [4/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [5/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [6/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [7/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_get_threshold [8/8]

#define intc_m_get_threshold ( )     intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

◆ intc_m_set_threshold [1/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [2/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [3/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [4/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [5/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [6/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [7/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_m_set_threshold [8/8]

#define intc_m_set_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

◆ intc_s_claim_irq [1/5]

#define intc_s_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_S_MODE)

◆ intc_s_claim_irq [2/5]

#define intc_s_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_S_MODE)

◆ intc_s_claim_irq [3/5]

#define intc_s_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_S_MODE)

◆ intc_s_claim_irq [4/5]

#define intc_s_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_S_MODE)

◆ intc_s_claim_irq [5/5]

#define intc_s_claim_irq ( )    intc_claim_irq(HPM_PLIC_TARGET_S_MODE)

◆ intc_s_complete_irq [1/5]

#define intc_s_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_complete_irq [2/5]

#define intc_s_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_complete_irq [3/5]

#define intc_s_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_complete_irq [4/5]

#define intc_s_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_complete_irq [5/5]

#define intc_s_complete_irq (   irq)     intc_complete_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_disable_irq [1/5]

#define intc_s_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_disable_irq [2/5]

#define intc_s_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_disable_irq [3/5]

#define intc_s_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_disable_irq [4/5]

#define intc_s_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_disable_irq [5/5]

#define intc_s_disable_irq (   irq)     intc_disable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq [1/5]

#define intc_s_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq [2/5]

#define intc_s_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq [3/5]

#define intc_s_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq [4/5]

#define intc_s_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq [5/5]

#define intc_s_enable_irq (   irq)     intc_enable_irq(HPM_PLIC_TARGET_S_MODE, irq)

◆ intc_s_enable_irq_with_priority [1/5]

#define intc_s_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_s_enable_irq(irq); \
} while (0)

◆ intc_s_enable_irq_with_priority [2/5]

#define intc_s_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_s_enable_irq(irq); \
} while (0)

◆ intc_s_enable_irq_with_priority [3/5]

#define intc_s_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_s_enable_irq(irq); \
} while (0)

◆ intc_s_enable_irq_with_priority [4/5]

#define intc_s_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_s_enable_irq(irq); \
} while (0)

◆ intc_s_enable_irq_with_priority [5/5]

#define intc_s_enable_irq_with_priority (   irq,
  priority 
)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
do { \
intc_set_irq_priority(irq, priority); \
intc_s_enable_irq(irq); \
} while (0)

◆ intc_set_s_threshold [1/5]

#define intc_set_s_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)

◆ intc_set_s_threshold [2/5]

#define intc_set_s_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)

◆ intc_set_s_threshold [3/5]

#define intc_set_s_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)

◆ intc_set_s_threshold [4/5]

#define intc_set_s_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)

◆ intc_set_s_threshold [5/5]

#define intc_set_s_threshold (   threshold)     intc_set_threshold(HPM_PLIC_TARGET_S_MODE, threshold)

◆ ISR_NAME_M [1/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [2/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [3/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [4/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [5/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [6/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [7/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_M [8/8]

#define ISR_NAME_M (   irq_num)    default_isr_##irq_num

◆ ISR_NAME_S [1/5]

#define ISR_NAME_S (   irq_num)    default_isr_s_##irq_num

◆ ISR_NAME_S [2/5]

#define ISR_NAME_S (   irq_num)    default_isr_s_##irq_num

◆ ISR_NAME_S [3/5]

#define ISR_NAME_S (   irq_num)    default_isr_s_##irq_num

◆ ISR_NAME_S [4/5]

#define ISR_NAME_S (   irq_num)    default_isr_s_##irq_num

◆ ISR_NAME_S [5/5]

#define ISR_NAME_S (   irq_num)    default_isr_s_##irq_num

◆ M_MODE [1/8]

#define M_MODE   0

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Machine mode

◆ M_MODE [2/8]

#define M_MODE   0

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Machine mode

◆ M_MODE [3/8]

#define M_MODE   0

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Machine mode

◆ M_MODE [4/8]

#define M_MODE   0

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Machine mode

◆ M_MODE [5/8]

#define M_MODE   0

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Machine mode

◆ M_MODE [6/8]

#define M_MODE   0

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Machine mode

◆ M_MODE [7/8]

#define M_MODE   0

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Machine mode

◆ M_MODE [8/8]

#define M_MODE   0

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Machine mode

◆ MODE_SWITCH_FROM_M [1/5]

#define MODE_SWITCH_FROM_M (   mstatus,
  mepc,
  label,
  mode 
)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
do { \
if (label) { \
write_csr(mepc, label); \
} \
clear_csr(mstatus, CSR_MSTATUS_MPP_MASK); \
set_csr(mstatus, CSR_MSTATUS_MPP_SET(mode)); \
} while(0)
#define CSR_MSTATUS_MPP_MASK
Definition: hpm_csr_regs.h:381
#define CSR_MSTATUS_MPP_SET(x)
Definition: hpm_csr_regs.h:383

◆ MODE_SWITCH_FROM_M [2/5]

#define MODE_SWITCH_FROM_M (   mstatus,
  mepc,
  label,
  mode 
)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
do { \
if (label) { \
write_csr(mepc, label); \
} \
clear_csr(mstatus, CSR_MSTATUS_MPP_MASK); \
set_csr(mstatus, CSR_MSTATUS_MPP_SET(mode)); \
} while(0)

◆ MODE_SWITCH_FROM_M [3/5]

#define MODE_SWITCH_FROM_M (   mstatus,
  mepc,
  label,
  mode 
)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
do { \
if (label) { \
write_csr(mepc, label); \
} \
clear_csr(mstatus, CSR_MSTATUS_MPP_MASK); \
set_csr(mstatus, CSR_MSTATUS_MPP_SET(mode)); \
} while(0)

◆ MODE_SWITCH_FROM_M [4/5]

#define MODE_SWITCH_FROM_M (   mstatus,
  mepc,
  label,
  mode 
)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
do { \
if (label) { \
write_csr(mepc, label); \
} \
clear_csr(mstatus, CSR_MSTATUS_MPP_MASK); \
set_csr(mstatus, CSR_MSTATUS_MPP_SET(mode)); \
} while(0)

◆ MODE_SWITCH_FROM_M [5/5]

#define MODE_SWITCH_FROM_M (   mstatus,
  mepc,
  label,
  mode 
)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
do { \
if (label) { \
write_csr(mepc, label); \
} \
clear_csr(mstatus, CSR_MSTATUS_MPP_MASK); \
set_csr(mstatus, CSR_MSTATUS_MPP_SET(mode)); \
} while(0)

◆ NESTED_IRQ_ENTER [1/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \
#define CSR_MEPC
Definition: hpm_csr_regs.h:31
#define CSR_MSTATUS
Definition: hpm_csr_regs.h:21
#define CSR_MSTATUS_MIE_MASK
Definition: hpm_csr_regs.h:413
#define SAVE_CSR(r)
Definition: hpm_interrupt.h:321

◆ NESTED_IRQ_ENTER [2/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [3/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [4/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [5/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [6/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [7/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_ENTER [8/8]

#define NESTED_IRQ_ENTER ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
SAVE_CSR(CSR_MSTATUS) \
SAVE_MXSTATUS() \
SAVE_FCSR() \
SAVE_UCODE() \

◆ NESTED_IRQ_EXIT [1/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()
#define RESTORE_CSR(r)
Definition: hpm_interrupt.h:328

◆ NESTED_IRQ_EXIT [2/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [3/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [4/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [5/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [6/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [7/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ NESTED_IRQ_EXIT [8/8]

#define NESTED_IRQ_EXIT ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
RESTORE_CSR(CSR_MEPC) \
RESTORE_MXSTATUS() \
RESTORE_FCSR() \
RESTORE_UCODE()

◆ PLICSWI [1/8]

#define PLICSWI   1

◆ PLICSWI [2/8]

#define PLICSWI   1

◆ PLICSWI [3/8]

#define PLICSWI   1

◆ PLICSWI [4/8]

#define PLICSWI   1

◆ PLICSWI [5/8]

#define PLICSWI   1

◆ PLICSWI [6/8]

#define PLICSWI   1

◆ PLICSWI [7/8]

#define PLICSWI   1

◆ PLICSWI [8/8]

#define PLICSWI   1

◆ RESTORE_CALLER_CONTEXT [1/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}
#define CONTEXT_REG_NUM
Definition: hpm_interrupt.h:365

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [2/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [3/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [4/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [5/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [6/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [7/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CALLER_CONTEXT [8/8]

#define RESTORE_CALLER_CONTEXT ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("\n\ c.lwsp ra, 0*4(sp) \n\ c.lwsp t0, 1*4(sp) \n\ c.lwsp t1, 2*4(sp) \n\ c.lwsp t2, 3*4(sp) \n\ c.lwsp s1, 4*4(sp) \n\ c.lwsp a0, 5*4(sp) \n\ c.lwsp a1, 6*4(sp) \n\ c.lwsp a2, 7*4(sp) \n\ c.lwsp a3, 8*4(sp) \n\ c.lwsp a4, 9*4(sp) \n\ c.lwsp a5, 10*4(sp) \n\ c.lwsp a6, 11*4(sp) \n\ c.lwsp a7, 12*4(sp) \n\ c.lwsp s2, 13*4(sp) \n\ c.lwsp s3, 14*4(sp) \n\ c.lwsp s4, 15*4(sp) \n\ c.lwsp s5, 16*4(sp) \n\ c.lwsp s6, 17*4(sp) \n\ c.lwsp t3, 18*4(sp) \n\ c.lwsp t4, 19*4(sp) \n\ c.lwsp t5, 20*4(sp) \n\ c.lwsp t6, 21*4(sp) \n");\
RESTORE_FPU_CONTEXT(); \
__asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CSR [1/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [2/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [3/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [4/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [5/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [6/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [7/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_CSR [8/8]

#define RESTORE_CSR (   r)    write_csr(r, __##r);

◆ RESTORE_DSP_CONTEXT [1/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [2/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [3/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [4/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [5/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [6/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [7/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_DSP_CONTEXT [8/8]

#define RESTORE_DSP_CONTEXT ( )

◆ RESTORE_FCSR [1/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [2/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [3/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [4/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [5/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [6/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [7/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FCSR [8/8]

#define RESTORE_FCSR ( )

◆ RESTORE_FPU_CONTEXT [1/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [2/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [3/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [4/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [5/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [6/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [7/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_CONTEXT [8/8]

#define RESTORE_FPU_CONTEXT ( )

◆ RESTORE_FPU_STATE [1/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [2/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [3/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [4/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [5/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [6/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [7/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_FPU_STATE [8/8]

#define RESTORE_FPU_STATE ( )

◆ RESTORE_MCCTL_CONTEXT [1/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}
#define CSR_MCCTLDATA
Definition: hpm_csr_regs.h:106
#define CSR_MCCTLBEGINADDR
Definition: hpm_csr_regs.h:104

◆ RESTORE_MCCTL_CONTEXT [2/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [3/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [4/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [5/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [6/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [7/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MCCTL_CONTEXT [8/8]

#define RESTORE_MCCTL_CONTEXT ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{\
__asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
__asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MXSTATUS [1/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [2/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [3/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [4/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [5/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [6/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [7/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_MXSTATUS [8/8]

#define RESTORE_MXSTATUS ( )

◆ RESTORE_UCODE [1/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [2/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [3/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [4/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [5/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [6/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [7/8]

#define RESTORE_UCODE ( )

◆ RESTORE_UCODE [8/8]

#define RESTORE_UCODE ( )

◆ S_MODE [1/8]

#define S_MODE   1

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [2/8]

#define S_MODE   1

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [3/8]

#define S_MODE   1

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [4/8]

#define S_MODE   1

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [5/8]

#define S_MODE   1

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [6/8]

#define S_MODE   1

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [7/8]

#define S_MODE   1

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Supervisor mode

◆ S_MODE [8/8]

#define S_MODE   1

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Supervisor mode

◆ SAVE_CALLER_CONTEXT [1/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [2/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [3/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [4/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [5/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [6/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [7/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CALLER_CONTEXT [8/8]

#define SAVE_CALLER_CONTEXT ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
__asm volatile("\n\ c.swsp ra, 0*4(sp) \n\ c.swsp t0, 1*4(sp) \n\ c.swsp t1, 2*4(sp) \n\ c.swsp t2, 3*4(sp) \n\ c.swsp s1, 4*4(sp) \n\ c.swsp a0, 5*4(sp) \n\ c.swsp a1, 6*4(sp) \n\ c.swsp a2, 7*4(sp) \n\ c.swsp a3, 8*4(sp) \n\ c.swsp a4, 9*4(sp) \n\ c.swsp a5, 10*4(sp) \n\ c.swsp a6, 11*4(sp) \n\ c.swsp a7, 12*4(sp) \n\ c.swsp s2, 13*4(sp) \n\ c.swsp s3, 14*4(sp) \n\ c.swsp s4, 15*4(sp) \n\ c.swsp s5, 16*4(sp) \n\ c.swsp s6, 17*4(sp) \n\ c.swsp t3, 18*4(sp) \n\ c.swsp t4, 19*4(sp) \n\ c.swsp t5, 20*4(sp) \n\ c.swsp t6, 21*4(sp)"); \
SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CSR [1/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [2/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [3/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [4/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [5/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [6/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [7/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_CSR [8/8]

#define SAVE_CSR (   r)    register long __##r = read_csr(r);

◆ SAVE_DSP_CONTEXT [1/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [2/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [3/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [4/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [5/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [6/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [7/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_DSP_CONTEXT [8/8]

#define SAVE_DSP_CONTEXT ( )

◆ SAVE_FCSR [1/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [2/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [3/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [4/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [5/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [6/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [7/8]

#define SAVE_FCSR ( )

◆ SAVE_FCSR [8/8]

#define SAVE_FCSR ( )

◆ SAVE_FPU_CONTEXT [1/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [2/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [3/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [4/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [5/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [6/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [7/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_CONTEXT [8/8]

#define SAVE_FPU_CONTEXT ( )

◆ SAVE_FPU_STATE [1/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [2/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [3/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [4/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [5/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [6/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [7/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_FPU_STATE [8/8]

#define SAVE_FPU_STATE ( )

◆ SAVE_MCCTL_CONTEXT [1/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [2/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [3/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [4/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [5/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [6/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [7/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MCCTL_CONTEXT [8/8]

#define SAVE_MCCTL_CONTEXT ( )

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
{ \
__asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):); \
__asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):); \
}

◆ SAVE_MXSTATUS [1/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [2/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [3/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [4/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [5/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [6/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [7/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_MXSTATUS [8/8]

#define SAVE_MXSTATUS ( )

◆ SAVE_UCODE [1/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [2/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [3/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [4/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [5/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [6/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [7/8]

#define SAVE_UCODE ( )

◆ SAVE_UCODE [8/8]

#define SAVE_UCODE ( )

◆ SDK_DECLARE_EXT_ISR_M [1/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}
#define ISR_NAME_M(irq_num)
Definition: hpm_interrupt.h:832

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [2/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [3/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [4/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [5/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [6/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [7/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_M [8/8]

#define SDK_DECLARE_EXT_ISR_M (   irq_num,
  isr 
)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_M();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_M(irq_num);\
EXIT_NESTED_IRQ_HANDLING_M();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_S [1/5]

#define SDK_DECLARE_EXT_ISR_S (   irq_num,
  isr 
)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_s_vector")));\
HPM_EXTERN_C HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void);\
HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void) {\
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_S();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_S(irq_num);\
EXIT_NESTED_IRQ_HANDLING_S();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}
#define ISR_NAME_S(irq_num)
Definition: hpm_interrupt.h:1070

Declare an external interrupt handler for supervisor mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_S [2/5]

#define SDK_DECLARE_EXT_ISR_S (   irq_num,
  isr 
)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_s_vector")));\
HPM_EXTERN_C HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void);\
HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void) {\
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_S();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_S(irq_num);\
EXIT_NESTED_IRQ_HANDLING_S();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for supervisor mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_S [3/5]

#define SDK_DECLARE_EXT_ISR_S (   irq_num,
  isr 
)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_s_vector")));\
HPM_EXTERN_C HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void);\
HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void) {\
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_S();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_S(irq_num);\
EXIT_NESTED_IRQ_HANDLING_S();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for supervisor mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_S [4/5]

#define SDK_DECLARE_EXT_ISR_S (   irq_num,
  isr 
)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_s_vector")));\
HPM_EXTERN_C HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void);\
HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void) {\
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_S();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_S(irq_num);\
EXIT_NESTED_IRQ_HANDLING_S();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for supervisor mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_EXT_ISR_S [5/5]

#define SDK_DECLARE_EXT_ISR_S (   irq_num,
  isr 
)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_s_vector")));\
HPM_EXTERN_C HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void);\
HPM_ATTR_SUPERVISOR_INTERRUPT void ISR_NAME_S(irq_num)(void) {\
SAVE_CALLER_CONTEXT(); \
ENTER_NESTED_IRQ_HANDLING_S();\
__asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
__asm volatile("jalr t1\n");\
COMPLETE_IRQ_HANDLING_S(irq_num);\
EXIT_NESTED_IRQ_HANDLING_S();\
RESTORE_CALLER_CONTEXT();\
__asm volatile("fence io, io");\
}

Declare an external interrupt handler for supervisor mode.

Parameters
[in]irq_num- IRQ number index
[in]isr- Application IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [1/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) \
{ \
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [2/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) \
{ \
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [3/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [4/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [5/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) \
{ \
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [6/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [7/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR [8/8]

#define SDK_DECLARE_MCHTMR_ISR (   isr)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR_S [1/5]

#define SDK_DECLARE_MCHTMR_ISR_S (   isr)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_s_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_s_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR_S [2/5]

#define SDK_DECLARE_MCHTMR_ISR_S (   isr)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_s_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_s_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR_S [3/5]

#define SDK_DECLARE_MCHTMR_ISR_S (   isr)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_s_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_s_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR_S [4/5]

#define SDK_DECLARE_MCHTMR_ISR_S (   isr)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_s_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_s_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR_S [5/5]

#define SDK_DECLARE_MCHTMR_ISR_S (   isr)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_s_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_s_isr(void) {\
isr();\
}

Declare machine timer interrupt handler.

Parameters
[in]isr- MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [1/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) \
{ \
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [2/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM5300/HPM5361/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) \
{ \
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [3/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [4/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [5/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6700/HPM6750/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) \
{ \
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [6/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [7/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR [8/8]

#define SDK_DECLARE_SWI_ISR (   isr)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR_S [1/5]

#define SDK_DECLARE_SWI_ISR_S (   isr)

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_s_isr(void) __attribute__((section(".isr_vector"))); \
void swi_s_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR_S [2/5]

#define SDK_DECLARE_SWI_ISR_S (   isr)

#include <soc/HPM6300/HPM6360/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_s_isr(void) __attribute__((section(".isr_vector"))); \
void swi_s_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR_S [3/5]

#define SDK_DECLARE_SWI_ISR_S (   isr)

#include <soc/HPM6800/HPM6880/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_s_isr(void) __attribute__((section(".isr_vector"))); \
void swi_s_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR_S [4/5]

#define SDK_DECLARE_SWI_ISR_S (   isr)

#include <soc/HPM6E00/HPM6E80/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_s_isr(void) __attribute__((section(".isr_vector"))); \
void swi_s_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR_S [5/5]

#define SDK_DECLARE_SWI_ISR_S (   isr)

#include <soc/HPM6P00/HPM6P81/hpm_interrupt.h>

Value:
void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_s_isr(void) __attribute__((section(".isr_vector"))); \
void swi_s_isr(void) {\
isr();\
}

Declare machine software interrupt handler.

Parameters
[in]isr- SWI IRQ handler function pointer

Typedef Documentation

◆ s_mode_entry [1/5]

typedef void(* s_mode_entry) (void)

◆ s_mode_entry [2/5]

typedef void(* s_mode_entry) (void)

◆ s_mode_entry [3/5]

typedef void(* s_mode_entry) (void)

◆ s_mode_entry [4/5]

typedef void(* s_mode_entry) (void)

◆ s_mode_entry [5/5]

typedef void(* s_mode_entry) (void)

Function Documentation

◆ default_irq_entry()

void default_irq_entry ( void  )

◆ default_s_irq_entry()

void default_s_irq_entry ( void  )

◆ delegate_irq()

static ATTR_ALWAYS_INLINE void delegate_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Delegate IRQ handling.

Parameters
[in]maskinterrupt mask to be delegated

◆ disable_global_irq()

static ATTR_ALWAYS_INLINE uint32_t disable_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Disable global IRQ with mask and return mstatus.

Parameters
[in]maskinterrupt mask to be disabled
Return values
currentmstatus value before irq mask is disabled

◆ disable_irq_from_intc()

static ATTR_ALWAYS_INLINE void disable_irq_from_intc ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Disable IRQ from interrupt controller.

◆ disable_mchtmr_irq()

static ATTR_ALWAYS_INLINE void disable_mchtmr_irq ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Disable machine timer IRQ.

◆ disable_s_global_irq()

static ATTR_ALWAYS_INLINE uint32_t disable_s_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Disable global IRQ with mask and return sstatus for supervisor mode.

Parameters
[in]maskinterrupt mask to be disabled
Return values
currentsstatus value before irq mask is disabled

◆ disable_s_irq_from_intc()

static ATTR_ALWAYS_INLINE void disable_s_irq_from_intc ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Disable IRQ from interrupt controller for supervisor mode.

◆ disable_s_mchtmr_irq()

static ATTR_ALWAYS_INLINE void disable_s_mchtmr_irq ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Disable machine timer IRQ.

◆ enable_global_irq()

static ATTR_ALWAYS_INLINE void enable_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Enable global IRQ with mask.

Parameters
[in]maskinterrupt mask to be enabaled

◆ enable_irq_from_intc()

static ATTR_ALWAYS_INLINE void enable_irq_from_intc ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Enable IRQ from interrupt controller.

◆ enable_mchtmr_irq()

static ATTR_ALWAYS_INLINE void enable_mchtmr_irq ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Enable machine timer IRQ.

◆ enable_s_global_irq()

static ATTR_ALWAYS_INLINE void enable_s_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Enable global IRQ with mask for supervisor mode.

Parameters
[in]maskinterrupt mask to be enabaled

◆ enable_s_irq_from_intc()

static ATTR_ALWAYS_INLINE void enable_s_irq_from_intc ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Enable IRQ from interrupt controller for supervisor mode.

◆ enable_s_mchtmr_irq()

static ATTR_ALWAYS_INLINE void enable_s_mchtmr_irq ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Enable machine timer IRQ for supervisor mode.

◆ install_isr()

static ATTR_ALWAYS_INLINE void install_isr ( uint32_t  irq,
uint32_t  isr 
)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Install ISR for certain IRQ for ram based vector table.

Parameters
[in]irqTarget interrupt number
[in]isrInterrupt service routine

◆ install_s_isr()

static ATTR_ALWAYS_INLINE void install_s_isr ( uint32_t  irq,
uint32_t  isr 
)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Install ISR for certain IRQ for ram based vector table for supervisor mode.

Parameters
[in]irqTarget interrupt number
[in]isrInterrupt service routine

◆ intc_claim_irq()

static ATTR_ALWAYS_INLINE uint32_t intc_claim_irq ( uint32_t  target)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Claim IRQ.

Parameters
[in]targetTarget to handle specific interrupt

◆ intc_complete_irq()

static ATTR_ALWAYS_INLINE void intc_complete_irq ( uint32_t  target,
uint32_t  irq 
)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Complete IRQ.

Parameters
[in]targetTarget to handle specific interrupt
[in]irqSpecific IRQ to be completed

◆ intc_disable_irq()

static ATTR_ALWAYS_INLINE void intc_disable_irq ( uint32_t  target,
uint32_t  irq 
)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Disable specific interrupt.

Parameters
[in]targetTarget to handle specific interrupt
[in]irqInterrupt number

◆ intc_enable_irq()

static ATTR_ALWAYS_INLINE void intc_enable_irq ( uint32_t  target,
uint32_t  irq 
)
inlinestatic

◆ intc_get_threshold()

static ATTR_ALWAYS_INLINE uint32_t intc_get_threshold ( uint32_t  target)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Get interrupt threshold.

Parameters
[in]targetTarget to handle specific interrupt

◆ intc_m_claim_swi()

static ATTR_ALWAYS_INLINE void intc_m_claim_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Claim software interrupt.

◆ intc_m_complete_swi()

static ATTR_ALWAYS_INLINE void intc_m_complete_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Complete software interrupt.

◆ intc_m_disable_swi()

static ATTR_ALWAYS_INLINE void intc_m_disable_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Disable software interrupt.

◆ intc_m_enable_swi()

static ATTR_ALWAYS_INLINE void intc_m_enable_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Enable software interrupt.

◆ intc_m_init_swi()

static ATTR_ALWAYS_INLINE void intc_m_init_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Initialize software interrupt.

◆ intc_m_trigger_swi()

static ATTR_ALWAYS_INLINE void intc_m_trigger_swi ( void  )
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Trigger software interrupt.

◆ intc_s_complete_swi()

static ATTR_ALWAYS_INLINE void intc_s_complete_swi ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Complete software interrupt for supervisor mode.

◆ intc_s_disable_swi()

static ATTR_ALWAYS_INLINE void intc_s_disable_swi ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Disable software interrupt for supervisor mode.

◆ intc_s_enable_swi()

static ATTR_ALWAYS_INLINE void intc_s_enable_swi ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Enable software interrupt for supervisor mode.

◆ intc_s_trigger_swi()

static ATTR_ALWAYS_INLINE void intc_s_trigger_swi ( void  )
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Trigger software interrupt for supervisor mode.

◆ intc_set_irq_priority()

static ATTR_ALWAYS_INLINE void intc_set_irq_priority ( uint32_t  irq,
uint32_t  priority 
)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Set interrupt priority.

Parameters
[in]irqInterrupt number
[in]priorityPriority of interrupt

◆ intc_set_threshold()

static ATTR_ALWAYS_INLINE void intc_set_threshold ( uint32_t  target,
uint32_t  threshold 
)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Set interrupt threshold.

Parameters
[in]targetTarget to handle specific interrupt
[in]thresholdThreshold of IRQ can be serviced

◆ restore_global_irq()

static ATTR_ALWAYS_INLINE void restore_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Restore global IRQ with mask.

Parameters
[in]maskinterrupt mask to be restored

◆ restore_s_global_irq()

static ATTR_ALWAYS_INLINE void restore_s_global_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Restore global IRQ with mask for supervisor mode.

Parameters
[in]maskinterrupt mask to be restored

◆ switch_to_s_mode()

static void switch_to_s_mode ( s_mode_entry  entry)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Switch mode to supervisor from machine.

Parameters
[in]entry- entry point after mode is switched

◆ undelegate_irq()

static ATTR_ALWAYS_INLINE void undelegate_irq ( uint32_t  mask)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Undelegate IRQ handling.

Parameters
[in]maskinterrupt mask to be undelegated

◆ uninstall_isr()

static ATTR_ALWAYS_INLINE void uninstall_isr ( uint32_t  irq)
inlinestatic

#include <soc/HPM5300/HPM5301/hpm_interrupt.h>

Uninstall ISR for certain IRQ for ram based vector table.

Parameters
[in]irqTarget interrupt number

◆ uninstall_s_isr()

static ATTR_ALWAYS_INLINE void uninstall_s_isr ( uint32_t  irq)
inlinestatic

#include <soc/HPM6200/HPM6280/hpm_interrupt.h>

Uninstall ISR for certain IRQ for ram based vector table for supervisor mode.

Parameters
[in]irqTarget interrupt number