#include "hpm_soc_irq.h"#include "hpm_common.h"#include "hpm_gpio_regs.h"#include "hpm_plic_regs.h"#include "hpm_mchtmr_regs.h"#include "hpm_plic_sw_regs.h"#include "hpm_gpiom_regs.h"#include "hpm_adc16_regs.h"#include "hpm_acmp_regs.h"#include "hpm_dac_regs.h"#include "hpm_spi_regs.h"#include "hpm_uart_regs.h"#include "hpm_can_regs.h"#include "hpm_wdg_regs.h"#include "hpm_mbx_regs.h"#include "hpm_ptpc_regs.h"#include "hpm_dmamux_regs.h"#include "hpm_dma_regs.h"#include "hpm_rng_regs.h"#include "hpm_keym_regs.h"#include "hpm_i2s_regs.h"#include "hpm_dao_regs.h"#include "hpm_pdm_regs.h"#include "hpm_pwm_regs.h"#include "hpm_hall_regs.h"#include "hpm_qei_regs.h"#include "hpm_trgm_regs.h"#include "hpm_synt_regs.h"#include "hpm_enet_regs.h"#include "hpm_gptmr_regs.h"#include "hpm_usb_regs.h"#include "hpm_sdxc_regs.h"#include "hpm_i2c_regs.h"#include "hpm_sdp_regs.h"#include "hpm_femc_regs.h"#include "hpm_ffa_regs.h"#include "hpm_sysctl_regs.h"#include "hpm_ioc_regs.h"#include "hpm_otp_regs.h"#include "hpm_ppor_regs.h"#include "hpm_pcfg_regs.h"#include "hpm_psec_regs.h"#include "hpm_pmon_regs.h"#include "hpm_pgpr_regs.h"#include "hpm_pllctlv2_regs.h"#include "hpm_tsns_regs.h"#include "hpm_bacc_regs.h"#include "hpm_bpor_regs.h"#include "hpm_bcfg_regs.h"#include "hpm_butn_regs.h"#include "hpm_bgpr_regs.h"#include "hpm_bsec_regs.h"#include "hpm_rtc_regs.h"#include "hpm_bkey_regs.h"#include "hpm_bmon_regs.h"#include "hpm_tamp_regs.h"#include "hpm_mono_regs.h"#include "riscv/riscv_core.h"#include "hpm_csr_regs.h"#include "hpm_interrupt.h"#include "hpm_misc.h"#include "hpm_otp_table.h"#include "hpm_dmamux_src.h"#include "hpm_trgmmux_src.h"#include "hpm_iomux.h"#include "hpm_pmic_iomux.h"#include "hpm_batt_iomux.h"Go to the source code of this file.
| #define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE) |
| #define HPM_ACMP_BASE (0xF0020000UL) |
| #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE) |
| #define HPM_ADC0_BASE (0xF0010000UL) |
| #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE) |
| #define HPM_ADC1_BASE (0xF0014000UL) |
| #define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE) |
| #define HPM_ADC2_BASE (0xF0018000UL) |
| #define HPM_BACC ((BACC_Type *) HPM_BACC_BASE) |
| #define HPM_BACC_BASE (0xF5000000UL) |
| #define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE) |
| #define HPM_BCFG_BASE (0xF5008000UL) |
| #define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE) |
| #define HPM_BGPIO_BASE (0xF5014000UL) |
| #define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE) |
| #define HPM_BGPR_BASE (0xF5018000UL) |
| #define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE) |
| #define HPM_BIOC_BASE (0xF5010000UL) |
| #define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE) |
| #define HPM_BKEY_BASE (0xF5048000UL) |
| #define HPM_BMON ((BMON_Type *) HPM_BMON_BASE) |
| #define HPM_BMON_BASE (0xF504C000UL) |
| #define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE) |
| #define HPM_BPOR_BASE (0xF5004000UL) |
| #define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE) |
| #define HPM_BSEC_BASE (0xF5040000UL) |
| #define HPM_BUTN ((BUTN_Type *) HPM_BUTN_BASE) |
| #define HPM_BUTN_BASE (0xF500C000UL) |
| #define HPM_CAN0 ((CAN_Type *) HPM_CAN0_BASE) |
| #define HPM_CAN0_BASE (0xF0080000UL) |
| #define HPM_CAN1 ((CAN_Type *) HPM_CAN1_BASE) |
| #define HPM_CAN1_BASE (0xF0084000UL) |
| #define HPM_DAC ((DAC_Type *) HPM_DAC_BASE) |
| #define HPM_DAC_BASE (0xF0024000UL) |
| #define HPM_DAO ((DAO_Type *) HPM_DAO_BASE) |
| #define HPM_DAO_BASE (0xF0110000UL) |
| #define HPM_DM_BASE (0x30000000UL) |
| #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE) |
| #define HPM_DMAMUX_BASE (0xF00C0000UL) |
| #define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE) |
| #define HPM_ENET0_BASE (0xF2000000UL) |
| #define HPM_FEMC ((FEMC_Type *) HPM_FEMC_BASE) |
| #define HPM_FEMC_BASE (0xF3050000UL) |
| #define HPM_FFA ((FFA_Type *) HPM_FFA_BASE) |
| #define HPM_FFA_BASE (0xF3058000UL) |
| #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE) |
| #define HPM_FGPIO_BASE (0xC0000UL) |
| #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE) |
| #define HPM_GPIO0_BASE (0xF0000000UL) |
| #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE) |
| #define HPM_GPIOM_BASE (0xF0008000UL) |
| #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE) |
| #define HPM_GPTMR0_BASE (0xF3000000UL) |
| #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE) |
| #define HPM_GPTMR1_BASE (0xF3004000UL) |
| #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE) |
| #define HPM_GPTMR2_BASE (0xF3008000UL) |
| #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE) |
| #define HPM_GPTMR3_BASE (0xF300C000UL) |
| #define HPM_HALL0 ((HALL_Type *) HPM_HALL0_BASE) |
| #define HPM_HALL0_BASE (0xF0204000UL) |
| #define HPM_HALL1 ((HALL_Type *) HPM_HALL1_BASE) |
| #define HPM_HALL1_BASE (0xF0214000UL) |
| #define HPM_HDMA ((DMA_Type *) HPM_HDMA_BASE) |
| #define HPM_HDMA_BASE (0xF00C4000UL) |
| #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE) |
| #define HPM_I2C0_BASE (0xF3020000UL) |
| #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE) |
| #define HPM_I2C1_BASE (0xF3024000UL) |
| #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE) |
| #define HPM_I2C2_BASE (0xF3028000UL) |
| #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE) |
| #define HPM_I2C3_BASE (0xF302C000UL) |
| #define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE) |
| #define HPM_I2S0_BASE (0xF0100000UL) |
| #define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE) |
| #define HPM_I2S1_BASE (0xF0104000UL) |
| #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE) |
| #define HPM_IOC_BASE (0xF4040000UL) |
| #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE) |
| #define HPM_KEYM_BASE (0xF00CC000UL) |
| #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE) |
| #define HPM_MBX0A_BASE (0xF00A0000UL) |
| #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE) |
| #define HPM_MBX0B_BASE (0xF00A4000UL) |
| #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE) |
| #define HPM_MCHTMR_BASE (0xE6000000UL) |
| #define HPM_MONO ((MONO_Type *) HPM_MONO_BASE) |
| #define HPM_MONO_BASE (0xF5054000UL) |
| #define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE) |
| #define HPM_NTMR0_BASE (0xF2010000UL) |
| #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE) |
| #define HPM_OTP_BASE (0xF40C8000UL) |
| #define HPM_OTPSHW ((OTP_Type *) HPM_OTPSHW_BASE) |
| #define HPM_OTPSHW_BASE (0xF4080000UL) |
| #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE) |
| #define HPM_PCFG_BASE (0xF40C4000UL) |
| #define HPM_PDM ((PDM_Type *) HPM_PDM_BASE) |
| #define HPM_PDM_BASE (0xF0114000UL) |
| #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE) |
| #define HPM_PGPIO_BASE (0xF40DC000UL) |
| #define HPM_PGPR ((PGPR_Type *) HPM_PGPR_BASE) |
| #define HPM_PGPR_BASE (0xF40D4000UL) |
| #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE) |
| #define HPM_PIOC_BASE (0xF40D8000UL) |
| #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE) |
| #define HPM_PLIC_BASE (0xE4000000UL) |
| #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE) |
| #define HPM_PLICSW_BASE (0xE6400000UL) |
| #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE) |
| #define HPM_PLLCTLV2_BASE (0xF4100000UL) |
| #define HPM_PMON ((PMON_Type *) HPM_PMON_BASE) |
| #define HPM_PMON_BASE (0xF40D0000UL) |
| #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE) |
| #define HPM_PPOR_BASE (0xF40C0000UL) |
| #define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE) |
| #define HPM_PSEC_BASE (0xF40CC000UL) |
| #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE) |
| #define HPM_PTMR_BASE (0xF40E0000UL) |
| #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE) |
| #define HPM_PTPC_BASE (0xF00B0000UL) |
| #define HPM_PUART ((UART_Type *) HPM_PUART_BASE) |
| #define HPM_PUART_BASE (0xF40E4000UL) |
| #define HPM_PWDG ((WDG_Type *) HPM_PWDG_BASE) |
| #define HPM_PWDG_BASE (0xF40E8000UL) |
| #define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE) |
| #define HPM_PWM0_BASE (0xF0200000UL) |
| #define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE) |
| #define HPM_PWM1_BASE (0xF0210000UL) |
| #define HPM_QEI0 ((QEI_Type *) HPM_QEI0_BASE) |
| #define HPM_QEI0_BASE (0xF0208000UL) |
| #define HPM_QEI1 ((QEI_Type *) HPM_QEI1_BASE) |
| #define HPM_QEI1_BASE (0xF0218000UL) |
| #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE) |
| #define HPM_RNG_BASE (0xF00C8000UL) |
| #define HPM_ROMC_BASE (0xF3054000UL) |
| #define HPM_RTC ((RTC_Type *) HPM_RTC_BASE) |
| #define HPM_RTC_BASE (0xF5044000UL) |
| #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE) |
| #define HPM_SDP_BASE (0xF304C000UL) |
| #define HPM_SDXC0 ((SDXC_Type *) HPM_SDXC0_BASE) |
| #define HPM_SDXC0_BASE (0xF2030000UL) |
| #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE) |
| #define HPM_SPI0_BASE (0xF0030000UL) |
| #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE) |
| #define HPM_SPI1_BASE (0xF0034000UL) |
| #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE) |
| #define HPM_SPI2_BASE (0xF0038000UL) |
| #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE) |
| #define HPM_SPI3_BASE (0xF003C000UL) |
| #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE) |
| #define HPM_SYNT_BASE (0xF0240000UL) |
| #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE) |
| #define HPM_SYSCTL_BASE (0xF4000000UL) |
| #define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE) |
| #define HPM_TAMP_BASE (0xF5050000UL) |
| #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE) |
| #define HPM_TRGM0_BASE (0xF020C000UL) |
| #define HPM_TRGM1 ((TRGM_Type *) HPM_TRGM1_BASE) |
| #define HPM_TRGM1_BASE (0xF021C000UL) |
| #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE) |
| #define HPM_TSNS_BASE (0xF4104000UL) |
| #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE) |
| #define HPM_UART0_BASE (0xF0040000UL) |
| #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE) |
| #define HPM_UART1_BASE (0xF0044000UL) |
| #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE) |
| #define HPM_UART2_BASE (0xF0048000UL) |
| #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE) |
| #define HPM_UART3_BASE (0xF004C000UL) |
| #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE) |
| #define HPM_UART4_BASE (0xF0050000UL) |
| #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE) |
| #define HPM_UART5_BASE (0xF0054000UL) |
| #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE) |
| #define HPM_UART6_BASE (0xF0058000UL) |
| #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE) |
| #define HPM_UART7_BASE (0xF005C000UL) |
| #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE) |
| #define HPM_USB0_BASE (0xF2020000UL) |
| #define HPM_WDG0 ((WDG_Type *) HPM_WDG0_BASE) |
| #define HPM_WDG0_BASE (0xF0090000UL) |
| #define HPM_WDG1 ((WDG_Type *) HPM_WDG1_BASE) |
| #define HPM_WDG1_BASE (0xF0094000UL) |
| #define HPM_XDMA ((DMA_Type *) HPM_XDMA_BASE) |
| #define HPM_XDMA_BASE (0xF3048000UL) |