femc driver APIs More...

Data Structures
struct	femc_axi_q_weight_t
	Structure for specifying the configuration of AXI queue weight. More...

struct	femc_sdram_config_t
	Structure for specifying the configuration of SDRAM. More...

struct	femc_sram_config_t
	Structure for specifying the configuration of SRAM. More...

struct	femc_config_t
	Structure for specifying the configuration of FEMC. More...

struct	femc_cmd_t
	Structure for FEMC command. More...

Macros
#define	FEMC_SDRAM_MAX_BURST_LENGTH_IN_BYTE (8UL)

#define	FEMC_SDRAM_COLUMN_ADDR_12_BITS (0U)

#define	FEMC_SDRAM_COLUMN_ADDR_11_BITS (1U)

#define	FEMC_SDRAM_COLUMN_ADDR_10_BITS (2U)

#define	FEMC_SDRAM_COLUMN_ADDR_9_BITS (3U)

#define	FEMC_SDRAM_COLUMN_ADDR_8_BITS (4U)

#define	FEMC_SDRAM_CAS_LATENCY_1 (1U)

#define	FEMC_SDRAM_CAS_LATENCY_2 (2U)

#define	FEMC_SDRAM_CAS_LATENCY_3 (3U)

#define	FEMC_SDRAM_BANK_NUM_4 (0U)

#define	FEMC_SDRAM_BANK_NUM_2 (1U)

#define	FEMC_SDRAM_CS0 (0U)

#define	FEMC_SDRAM_CS1 (1U)

#define	FEMC_SDRAM_PORT_SIZE_8_BITS (0U)

#define	FEMC_SDRAM_PORT_SIZE_16_BITS (1U)

#define	FEMC_SDRAM_PORT_SIZE_32_BITS (2U)

#define	FEMC_AXI_Q_COUNT (2U)

#define	FEMC_AXI_Q_A (0U)

#define	FEMC_AXI_Q_B (1U)

#define	FEMC_DQS_INTERNAL (0U)

#define	FEMC_DQS_FROM_PAD (1U)

#define	FEMC_CMD_KEY FEMC_IPCMD_KEY_SET(0xA55A)

#define	FEMC_CMD_WRITE_FLAG (1UL << 31)

#define	FEMC_CMD_SDRAM_READ (0x8U)

#define	FEMC_CMD_SDRAM_WRITE (FEMC_CMD_WRITE_FLAG \| 0x9U)

#define	FEMC_CMD_SDRAM_MODE_SET (FEMC_CMD_WRITE_FLAG \| 0xAU)

#define	FEMC_CMD_SDRAM_ACTIVE (0xBU)

#define	FEMC_CMD_SDRAM_AUTO_REFRESH (0xCU)

#define	FEMC_CMD_SDRAM_SELF_REFRESH (0xDU)

#define	FEMC_CMD_SDRAM_PRECHARGE (0xEU)

#define	FEMC_CMD_SDRAM_PRECHARGE_ALL (0xFU)

#define	FEMC_SRAM_AD_MUX_MODE (0U)

#define	FEMC_SRAM_AD_NONMUX_MODE (3U)

#define	FEMC_SRAM_ADV_HOLD_HIGH (0U)

#define	FEMC_SRAM_ADV_HOLD_LOW (1U)

#define	FEMC_SRAM_ADV_ACTIVE_LOW (0U)

#define	FEMC_SRAM_ADV_ACTIVE_HIGH (1U)

#define	FEMC_SRAM_PORT_SIZE_8_BITS (0U)

#define	FEMC_SRAM_PORT_SIZE_16_BITS (1U)

#define	FEMC_IO_CSX_SDRAM_CS1 (1U)

#define	FEMC_IO_CSX_SRAM_CE (6U)

Enumerations
enum	{ status_femc_cmd_err = MAKE_STATUS(status_group_femc, 1) }

Functions
static void	femc_enable (FEMC_Type *ptr)
	femc enable More...

static void	femc_disable (FEMC_Type *ptr)
	femc disable More...

static void	femc_sw_reset (FEMC_Type *ptr)
	femc software reset More...

void	femc_default_config (FEMC_Type ptr, femc_config_t config)
	femc get default config More...

void	femc_init (FEMC_Type ptr, femc_config_t config)
	femc init controller More...

void	femc_get_typical_sdram_config (FEMC_Type ptr, femc_sdram_config_t config)
	femc get typical sdram config More...

hpm_stat_t	femc_config_sdram (FEMC_Type ptr, uint32_t clk_in_hz, femc_sdram_config_t config)
	femc config sdram More...

void	femc_get_typical_sram_config (FEMC_Type ptr, femc_sram_config_t config)
	femc get typical sram config More...

hpm_stat_t	femc_config_sram (FEMC_Type ptr, uint32_t clk_in_hz, femc_sram_config_t config)
	femc config sram More...

Detailed Description

femc driver APIs

Macro Definition Documentation

◆ FEMC_AXI_Q_A

#define FEMC_AXI_Q_A (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_AXI_Q_B

#define FEMC_AXI_Q_B (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_AXI_Q_COUNT

#define FEMC_AXI_Q_COUNT (2U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_KEY

#define FEMC_CMD_KEY FEMC_IPCMD_KEY_SET(0xA55A)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_ACTIVE

#define FEMC_CMD_SDRAM_ACTIVE (0xBU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_AUTO_REFRESH

#define FEMC_CMD_SDRAM_AUTO_REFRESH (0xCU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_MODE_SET

#define FEMC_CMD_SDRAM_MODE_SET (FEMC_CMD_WRITE_FLAG | 0xAU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_PRECHARGE

#define FEMC_CMD_SDRAM_PRECHARGE (0xEU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_PRECHARGE_ALL

#define FEMC_CMD_SDRAM_PRECHARGE_ALL (0xFU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_READ

#define FEMC_CMD_SDRAM_READ (0x8U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_SELF_REFRESH

#define FEMC_CMD_SDRAM_SELF_REFRESH (0xDU)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_SDRAM_WRITE

#define FEMC_CMD_SDRAM_WRITE (FEMC_CMD_WRITE_FLAG | 0x9U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_CMD_WRITE_FLAG

#define FEMC_CMD_WRITE_FLAG (1UL << 31)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_DQS_FROM_PAD

#define FEMC_DQS_FROM_PAD (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_DQS_INTERNAL

#define FEMC_DQS_INTERNAL (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_IO_CSX_SDRAM_CS1

#define FEMC_IO_CSX_SDRAM_CS1 (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_IO_CSX_SRAM_CE

#define FEMC_IO_CSX_SRAM_CE (6U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_BANK_NUM_2

#define FEMC_SDRAM_BANK_NUM_2 (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_BANK_NUM_4

#define FEMC_SDRAM_BANK_NUM_4 (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_CAS_LATENCY_1

#define FEMC_SDRAM_CAS_LATENCY_1 (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_CAS_LATENCY_2

#define FEMC_SDRAM_CAS_LATENCY_2 (2U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_CAS_LATENCY_3

#define FEMC_SDRAM_CAS_LATENCY_3 (3U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_COLUMN_ADDR_10_BITS

#define FEMC_SDRAM_COLUMN_ADDR_10_BITS (2U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_COLUMN_ADDR_11_BITS

#define FEMC_SDRAM_COLUMN_ADDR_11_BITS (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_COLUMN_ADDR_12_BITS

#define FEMC_SDRAM_COLUMN_ADDR_12_BITS (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_COLUMN_ADDR_8_BITS

#define FEMC_SDRAM_COLUMN_ADDR_8_BITS (4U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_COLUMN_ADDR_9_BITS

#define FEMC_SDRAM_COLUMN_ADDR_9_BITS (3U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_CS0

#define FEMC_SDRAM_CS0 (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_CS1

#define FEMC_SDRAM_CS1 (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_MAX_BURST_LENGTH_IN_BYTE

#define FEMC_SDRAM_MAX_BURST_LENGTH_IN_BYTE (8UL)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_PORT_SIZE_16_BITS

#define FEMC_SDRAM_PORT_SIZE_16_BITS (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_PORT_SIZE_32_BITS

#define FEMC_SDRAM_PORT_SIZE_32_BITS (2U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SDRAM_PORT_SIZE_8_BITS

#define FEMC_SDRAM_PORT_SIZE_8_BITS (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_AD_MUX_MODE

#define FEMC_SRAM_AD_MUX_MODE (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_AD_NONMUX_MODE

#define FEMC_SRAM_AD_NONMUX_MODE (3U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_ADV_ACTIVE_HIGH

#define FEMC_SRAM_ADV_ACTIVE_HIGH (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_ADV_ACTIVE_LOW

#define FEMC_SRAM_ADV_ACTIVE_LOW (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_ADV_HOLD_HIGH

#define FEMC_SRAM_ADV_HOLD_HIGH (0U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_ADV_HOLD_LOW

#define FEMC_SRAM_ADV_HOLD_LOW (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_PORT_SIZE_16_BITS

#define FEMC_SRAM_PORT_SIZE_16_BITS (1U)

#include <drivers/inc/hpm_femc_drv.h>

◆ FEMC_SRAM_PORT_SIZE_8_BITS

#define FEMC_SRAM_PORT_SIZE_8_BITS (0U)

#include <drivers/inc/hpm_femc_drv.h>

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_femc_drv.h>

Enumerator
status_femc_cmd_err

Function Documentation

◆ femc_config_sdram()

hpm_stat_t femc_config_sdram	(	FEMC_Type *	ptr,
		uint32_t	clk_in_hz,
		femc_sdram_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc config sdram

Configure FEMC controlling external SDRAM using parameters specified in femc_sdram_config_t

Parameters

[in]	ptr	FEMC base address
[in]	clk_in_hz	femc source clock frequency in Hz
[in]	config	femc_sdram_config_t sdram configuration struction to config femc

◆ femc_config_sram()

hpm_stat_t femc_config_sram	(	FEMC_Type *	ptr,
		uint32_t	clk_in_hz,
		femc_sram_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc config sram

Configure FEMC controlling external SRAM using parameters specified in femc_sram_config_t

Parameters

[in]	ptr	FEMC base address
[in]	clk_in_hz	femc source clock frequency in Hz
[in]	config	femc_sram_config_t sram configuration struction to config femc

◆ femc_default_config()

void femc_default_config	(	FEMC_Type *	ptr,
		femc_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc get default config

Get FEMC default parameters

Parameters

[in]	ptr	FEMC base address
[out]	config	femc_config_t address

◆ femc_disable()

static void femc_disable ( FEMC_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_femc_drv.h>

femc disable

Disable FEMC

Parameters

[in] ptr FEMC base address

◆ femc_enable()

static void femc_enable ( FEMC_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_femc_drv.h>

femc enable

Enable FEMC

Parameters

[in] ptr FEMC base address

◆ femc_get_typical_sdram_config()

void femc_get_typical_sdram_config	(	FEMC_Type *	ptr,
		femc_sdram_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc get typical sdram config

Fill out the structure of femc_sdram_config_t with typical SDRAM parameters which should work with most SDRAMs.

Parameters

[in]	ptr	FEMC base address
[out]	config	femc_sdram_config_t sdram configuration struction to config femc

◆ femc_get_typical_sram_config()

void femc_get_typical_sram_config	(	FEMC_Type *	ptr,
		femc_sram_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc get typical sram config

Fill out the structure of femc_sram_config_t with typical SRAM parameters which should work with most SRAMs.

Parameters

[in]	ptr	FEMC base address
[out]	config	femc_sdram_config_t sdram configuration struction to config femc

◆ femc_init()

void femc_init	(	FEMC_Type *	ptr,
		femc_config_t *	config
	)

#include <drivers/inc/hpm_femc_drv.h>

femc init controller

Initialize FEMC with give femc_config_t

Parameters

[in]	ptr	FEMC base address
[in]	config	femc_config_t to initialize femc

◆ femc_sw_reset()

static void femc_sw_reset ( FEMC_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_femc_drv.h>

femc software reset

Perform software reset

Parameters

[in] ptr FEMC base address

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ FEMC_AXI_Q_A

◆ FEMC_AXI_Q_B

◆ FEMC_AXI_Q_COUNT

◆ FEMC_CMD_KEY

◆ FEMC_CMD_SDRAM_ACTIVE

◆ FEMC_CMD_SDRAM_AUTO_REFRESH

◆ FEMC_CMD_SDRAM_MODE_SET

◆ FEMC_CMD_SDRAM_PRECHARGE

◆ FEMC_CMD_SDRAM_PRECHARGE_ALL

◆ FEMC_CMD_SDRAM_READ

◆ FEMC_CMD_SDRAM_SELF_REFRESH

◆ FEMC_CMD_SDRAM_WRITE

◆ FEMC_CMD_WRITE_FLAG

◆ FEMC_DQS_FROM_PAD

◆ FEMC_DQS_INTERNAL

◆ FEMC_IO_CSX_SDRAM_CS1

◆ FEMC_IO_CSX_SRAM_CE

◆ FEMC_SDRAM_BANK_NUM_2

◆ FEMC_SDRAM_BANK_NUM_4

◆ FEMC_SDRAM_CAS_LATENCY_1

◆ FEMC_SDRAM_CAS_LATENCY_2

◆ FEMC_SDRAM_CAS_LATENCY_3

◆ FEMC_SDRAM_COLUMN_ADDR_10_BITS

◆ FEMC_SDRAM_COLUMN_ADDR_11_BITS

◆ FEMC_SDRAM_COLUMN_ADDR_12_BITS

◆ FEMC_SDRAM_COLUMN_ADDR_8_BITS

◆ FEMC_SDRAM_COLUMN_ADDR_9_BITS

◆ FEMC_SDRAM_CS0

◆ FEMC_SDRAM_CS1

◆ FEMC_SDRAM_MAX_BURST_LENGTH_IN_BYTE

◆ FEMC_SDRAM_PORT_SIZE_16_BITS

◆ FEMC_SDRAM_PORT_SIZE_32_BITS

◆ FEMC_SDRAM_PORT_SIZE_8_BITS

◆ FEMC_SRAM_AD_MUX_MODE

◆ FEMC_SRAM_AD_NONMUX_MODE

◆ FEMC_SRAM_ADV_ACTIVE_HIGH

◆ FEMC_SRAM_ADV_ACTIVE_LOW

◆ FEMC_SRAM_ADV_HOLD_HIGH

◆ FEMC_SRAM_ADV_HOLD_LOW

◆ FEMC_SRAM_PORT_SIZE_16_BITS

◆ FEMC_SRAM_PORT_SIZE_8_BITS

Enumeration Type Documentation

◆ anonymous enum

Function Documentation

◆ femc_config_sdram()

◆ femc_config_sram()

◆ femc_default_config()

◆ femc_disable()

◆ femc_enable()

◆ femc_get_typical_sdram_config()

◆ femc_get_typical_sram_config()

◆ femc_init()

◆ femc_sw_reset()