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Data Structures | |
| struct | SDADC_Type |
| #define SDADC_CLK_DIV_FACTOR_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CLK_DIV_FACTOR_MASK) >> SDADC_CLK_DIV_FACTOR_SHIFT) |
| #define SDADC_CLK_DIV_FACTOR_MASK (0xFFU) |
| #define SDADC_CLK_DIV_FACTOR_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CLK_DIV_FACTOR_SHIFT) & SDADC_CLK_DIV_FACTOR_MASK) |
| #define SDADC_CLK_DIV_FACTOR_SHIFT (0U) |
| #define SDADC_CTRL_ANA_PWUP_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_ANA_PWUP_MASK) >> SDADC_CTRL_ANA_PWUP_SHIFT) |
| #define SDADC_CTRL_ANA_PWUP_MASK (0x20U) |
| #define SDADC_CTRL_ANA_PWUP_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_ANA_PWUP_SHIFT) & SDADC_CTRL_ANA_PWUP_MASK) |
| #define SDADC_CTRL_ANA_PWUP_SHIFT (5U) |
| #define SDADC_CTRL_BYPASS_PGA_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_BYPASS_PGA_MASK) >> SDADC_CTRL_BYPASS_PGA_SHIFT) |
| #define SDADC_CTRL_BYPASS_PGA_MASK (0x10U) |
| #define SDADC_CTRL_BYPASS_PGA_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_BYPASS_PGA_SHIFT) & SDADC_CTRL_BYPASS_PGA_MASK) |
| #define SDADC_CTRL_BYPASS_PGA_SHIFT (4U) |
| #define SDADC_CTRL_CFG_CDS_CMD_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_CFG_CDS_CMD_MASK) >> SDADC_CTRL_CFG_CDS_CMD_SHIFT) |
| #define SDADC_CTRL_CFG_CDS_CMD_MASK (0x2000U) |
| #define SDADC_CTRL_CFG_CDS_CMD_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_CFG_CDS_CMD_SHIFT) & SDADC_CTRL_CFG_CDS_CMD_MASK) |
| #define SDADC_CTRL_CFG_CDS_CMD_SHIFT (13U) |
| #define SDADC_CTRL_CONT_MODE_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_CONT_MODE_MASK) >> SDADC_CTRL_CONT_MODE_SHIFT) |
| #define SDADC_CTRL_CONT_MODE_MASK (0x8U) |
| #define SDADC_CTRL_CONT_MODE_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_CONT_MODE_SHIFT) & SDADC_CTRL_CONT_MODE_MASK) |
| #define SDADC_CTRL_CONT_MODE_SHIFT (3U) |
| #define SDADC_CTRL_EN_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_EN_MASK) >> SDADC_CTRL_EN_SHIFT) |
| #define SDADC_CTRL_EN_MASK (0x1U) |
| #define SDADC_CTRL_EN_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_EN_SHIFT) & SDADC_CTRL_EN_MASK) |
| #define SDADC_CTRL_EN_SHIFT (0U) |
| #define SDADC_CTRL_LP_MODE_PGA_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_LP_MODE_PGA_MASK) >> SDADC_CTRL_LP_MODE_PGA_SHIFT) |
| #define SDADC_CTRL_LP_MODE_PGA_MASK (0x1C0U) |
| #define SDADC_CTRL_LP_MODE_PGA_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_LP_MODE_PGA_SHIFT) & SDADC_CTRL_LP_MODE_PGA_MASK) |
| #define SDADC_CTRL_LP_MODE_PGA_SHIFT (6U) |
| #define SDADC_CTRL_LP_MODE_SDM_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_LP_MODE_SDM_MASK) >> SDADC_CTRL_LP_MODE_SDM_SHIFT) |
| #define SDADC_CTRL_LP_MODE_SDM_MASK (0xE00U) |
| #define SDADC_CTRL_LP_MODE_SDM_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_LP_MODE_SDM_SHIFT) & SDADC_CTRL_LP_MODE_SDM_MASK) |
| #define SDADC_CTRL_LP_MODE_SDM_SHIFT (9U) |
| #define SDADC_CTRL_RST_PGA_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_RST_PGA_MASK) >> SDADC_CTRL_RST_PGA_SHIFT) |
| #define SDADC_CTRL_RST_PGA_MASK (0x2U) |
| #define SDADC_CTRL_RST_PGA_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_RST_PGA_SHIFT) & SDADC_CTRL_RST_PGA_MASK) |
| #define SDADC_CTRL_RST_PGA_SHIFT (1U) |
| #define SDADC_CTRL_RST_SDM_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_RST_SDM_MASK) >> SDADC_CTRL_RST_SDM_SHIFT) |
| #define SDADC_CTRL_RST_SDM_MASK (0x4U) |
| #define SDADC_CTRL_RST_SDM_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_RST_SDM_SHIFT) & SDADC_CTRL_RST_SDM_MASK) |
| #define SDADC_CTRL_RST_SDM_SHIFT (2U) |
| #define SDADC_CTRL_SDM_CFG_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_SDM_CFG_MASK) >> SDADC_CTRL_SDM_CFG_SHIFT) |
| #define SDADC_CTRL_SDM_CFG_MASK (0xFF00000UL) |
| #define SDADC_CTRL_SDM_CFG_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_SDM_CFG_SHIFT) & SDADC_CTRL_SDM_CFG_MASK) |
| #define SDADC_CTRL_SDM_CFG_SHIFT (20U) |
| #define SDADC_CTRL_SDM_PGA_CE_SEL_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_SDM_PGA_CE_SEL_MASK) >> SDADC_CTRL_SDM_PGA_CE_SEL_SHIFT) |
| #define SDADC_CTRL_SDM_PGA_CE_SEL_MASK (0xC0000UL) |
| #define SDADC_CTRL_SDM_PGA_CE_SEL_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_SDM_PGA_CE_SEL_SHIFT) & SDADC_CTRL_SDM_PGA_CE_SEL_MASK) |
| #define SDADC_CTRL_SDM_PGA_CE_SEL_SHIFT (18U) |
| #define SDADC_CTRL_SDM_PGA_CH_SEL_GET | ( | x | ) | (((uint32_t)(x) & SDADC_CTRL_SDM_PGA_CH_SEL_MASK) >> SDADC_CTRL_SDM_PGA_CH_SEL_SHIFT) |
| #define SDADC_CTRL_SDM_PGA_CH_SEL_MASK (0x3C000UL) |
| #define SDADC_CTRL_SDM_PGA_CH_SEL_SET | ( | x | ) | (((uint32_t)(x) << SDADC_CTRL_SDM_PGA_CH_SEL_SHIFT) & SDADC_CTRL_SDM_PGA_CH_SEL_MASK) |
| #define SDADC_CTRL_SDM_PGA_CH_SEL_SHIFT (14U) |
| #define SDADC_MISC_BURST_DONE_IE_GET | ( | x | ) | (((uint32_t)(x) & SDADC_MISC_BURST_DONE_IE_MASK) >> SDADC_MISC_BURST_DONE_IE_SHIFT) |
| #define SDADC_MISC_BURST_DONE_IE_MASK (0x2U) |
| #define SDADC_MISC_BURST_DONE_IE_SET | ( | x | ) | (((uint32_t)(x) << SDADC_MISC_BURST_DONE_IE_SHIFT) & SDADC_MISC_BURST_DONE_IE_MASK) |
| #define SDADC_MISC_BURST_DONE_IE_SHIFT (1U) |
| #define SDADC_MISC_PDM_CLK_SEL_GET | ( | x | ) | (((uint32_t)(x) & SDADC_MISC_PDM_CLK_SEL_MASK) >> SDADC_MISC_PDM_CLK_SEL_SHIFT) |
| #define SDADC_MISC_PDM_CLK_SEL_MASK (0x1U) |
| #define SDADC_MISC_PDM_CLK_SEL_SET | ( | x | ) | (((uint32_t)(x) << SDADC_MISC_PDM_CLK_SEL_SHIFT) & SDADC_MISC_PDM_CLK_SEL_MASK) |
| #define SDADC_MISC_PDM_CLK_SEL_SHIFT (0U) |
| #define SDADC_ST_ANA_RST_GET | ( | x | ) | (((uint32_t)(x) & SDADC_ST_ANA_RST_MASK) >> SDADC_ST_ANA_RST_SHIFT) |
| #define SDADC_ST_ANA_RST_MASK (0x4U) |
| #define SDADC_ST_ANA_RST_SHIFT (2U) |
| #define SDADC_ST_BURST_DONE_GET | ( | x | ) | (((uint32_t)(x) & SDADC_ST_BURST_DONE_MASK) >> SDADC_ST_BURST_DONE_SHIFT) |
| #define SDADC_ST_BURST_DONE_MASK (0x1U) |
| #define SDADC_ST_BURST_DONE_SHIFT (0U) |
| #define SDADC_ST_DIV_STABLE_GET | ( | x | ) | (((uint32_t)(x) & SDADC_ST_DIV_STABLE_MASK) >> SDADC_ST_DIV_STABLE_SHIFT) |
| #define SDADC_ST_DIV_STABLE_MASK (0x2U) |
| #define SDADC_ST_DIV_STABLE_SHIFT (1U) |
| #define SDADC_START_OP_SDM_EN_GET | ( | x | ) | (((uint32_t)(x) & SDADC_START_OP_SDM_EN_MASK) >> SDADC_START_OP_SDM_EN_SHIFT) |
| #define SDADC_START_OP_SDM_EN_MASK (0x1U) |
| #define SDADC_START_OP_SDM_EN_SET | ( | x | ) | (((uint32_t)(x) << SDADC_START_OP_SDM_EN_SHIFT) & SDADC_START_OP_SDM_EN_MASK) |
| #define SDADC_START_OP_SDM_EN_SHIFT (0U) |
| #define SDADC_TTB_VAL_GET | ( | x | ) | (((uint32_t)(x) & SDADC_TTB_VAL_MASK) >> SDADC_TTB_VAL_SHIFT) |
| #define SDADC_TTB_VAL_MASK (0xFFFFFUL) |
| #define SDADC_TTB_VAL_SET | ( | x | ) | (((uint32_t)(x) << SDADC_TTB_VAL_SHIFT) & SDADC_TTB_VAL_MASK) |
| #define SDADC_TTB_VAL_SHIFT (0U) |