HPM SDK
HPMicro Software Development Kit
hpm_soc.h
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1 /*
2  * Copyright (c) 2021-2025 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_H
10 #define HPM_SOC_H
11 
12 
13 #include "hpm_soc_irq.h"
14 #include "hpm_common.h"
15 
16 #include "hpm_gpio_regs.h"
17 /* Address of GPIO instances */
18 /* FGPIO base address */
19 #define HPM_FGPIO_BASE (0xC0000UL)
20 /* FGPIO base pointer */
21 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
22 /* GPIO0 base address */
23 #define HPM_GPIO0_BASE (0xF00D0000UL)
24 /* GPIO0 base pointer */
25 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
26 /* PGPIO base address */
27 #define HPM_PGPIO_BASE (0xF411C000UL)
28 /* PGPIO base pointer */
29 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
30 
31 /* Address of DM instances */
32 /* DM base address */
33 #define HPM_DM_BASE (0x30000000UL)
34 
35 #include "hpm_plic_regs.h"
36 /* Address of PLIC instances */
37 /* PLIC base address */
38 #define HPM_PLIC_BASE (0xE4000000UL)
39 /* PLIC base pointer */
40 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
41 
42 #include "hpm_mchtmr_regs.h"
43 /* Address of MCHTMR instances */
44 /* MCHTMR base address */
45 #define HPM_MCHTMR_BASE (0xE6000000UL)
46 /* MCHTMR base pointer */
47 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
48 
49 #include "hpm_plic_sw_regs.h"
50 /* Address of PLICSW instances */
51 /* PLICSW base address */
52 #define HPM_PLICSW_BASE (0xE6400000UL)
53 /* PLICSW base pointer */
54 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
55 
56 #include "hpm_gptmr_regs.h"
57 /* Address of GPTMR instances */
58 /* GPTMR0 base address */
59 #define HPM_GPTMR0_BASE (0xF0000000UL)
60 /* GPTMR0 base pointer */
61 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
62 /* GPTMR1 base address */
63 #define HPM_GPTMR1_BASE (0xF0004000UL)
64 /* GPTMR1 base pointer */
65 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
66 /* GPTMR2 base address */
67 #define HPM_GPTMR2_BASE (0xF0008000UL)
68 /* GPTMR2 base pointer */
69 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
70 /* GPTMR3 base address */
71 #define HPM_GPTMR3_BASE (0xF000C000UL)
72 /* GPTMR3 base pointer */
73 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
74 /* PTMR base address */
75 #define HPM_PTMR_BASE (0xF4120000UL)
76 /* PTMR base pointer */
77 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
78 
79 #include "hpm_uart_regs.h"
80 /* Address of UART instances */
81 /* UART0 base address */
82 #define HPM_UART0_BASE (0xF0040000UL)
83 /* UART0 base pointer */
84 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
85 /* UART1 base address */
86 #define HPM_UART1_BASE (0xF0044000UL)
87 /* UART1 base pointer */
88 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
89 /* UART2 base address */
90 #define HPM_UART2_BASE (0xF0048000UL)
91 /* UART2 base pointer */
92 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
93 /* UART3 base address */
94 #define HPM_UART3_BASE (0xF004C000UL)
95 /* UART3 base pointer */
96 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
97 /* UART4 base address */
98 #define HPM_UART4_BASE (0xF0050000UL)
99 /* UART4 base pointer */
100 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
101 /* UART5 base address */
102 #define HPM_UART5_BASE (0xF0054000UL)
103 /* UART5 base pointer */
104 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
105 /* UART6 base address */
106 #define HPM_UART6_BASE (0xF0058000UL)
107 /* UART6 base pointer */
108 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
109 /* UART7 base address */
110 #define HPM_UART7_BASE (0xF005C000UL)
111 /* UART7 base pointer */
112 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
113 /* PUART base address */
114 #define HPM_PUART_BASE (0xF4124000UL)
115 /* PUART base pointer */
116 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
117 
118 #include "hpm_i2c_regs.h"
119 /* Address of I2C instances */
120 /* I2C0 base address */
121 #define HPM_I2C0_BASE (0xF0060000UL)
122 /* I2C0 base pointer */
123 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
124 /* I2C1 base address */
125 #define HPM_I2C1_BASE (0xF0064000UL)
126 /* I2C1 base pointer */
127 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
128 /* I2C2 base address */
129 #define HPM_I2C2_BASE (0xF0068000UL)
130 /* I2C2 base pointer */
131 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
132 /* I2C3 base address */
133 #define HPM_I2C3_BASE (0xF006C000UL)
134 /* I2C3 base pointer */
135 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
136 
137 #include "hpm_spi_regs.h"
138 /* Address of SPI instances */
139 /* SPI0 base address */
140 #define HPM_SPI0_BASE (0xF0070000UL)
141 /* SPI0 base pointer */
142 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
143 /* SPI1 base address */
144 #define HPM_SPI1_BASE (0xF0074000UL)
145 /* SPI1 base pointer */
146 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
147 /* SPI2 base address */
148 #define HPM_SPI2_BASE (0xF0078000UL)
149 /* SPI2 base pointer */
150 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
151 /* SPI3 base address */
152 #define HPM_SPI3_BASE (0xF007C000UL)
153 /* SPI3 base pointer */
154 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
155 
156 #include "hpm_crc_regs.h"
157 /* Address of CRC instances */
158 /* CRC base address */
159 #define HPM_CRC_BASE (0xF0080000UL)
160 /* CRC base pointer */
161 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
162 
163 #include "hpm_tsns_regs.h"
164 /* Address of TSNS instances */
165 /* TSNS base address */
166 #define HPM_TSNS_BASE (0xF0090000UL)
167 /* TSNS base pointer */
168 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
169 
170 #include "hpm_mbx_regs.h"
171 /* Address of MBX instances */
172 /* MBX0A base address */
173 #define HPM_MBX0A_BASE (0xF00A0000UL)
174 /* MBX0A base pointer */
175 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
176 /* MBX0B base address */
177 #define HPM_MBX0B_BASE (0xF00A4000UL)
178 /* MBX0B base pointer */
179 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
180 
181 #include "hpm_ewdg_regs.h"
182 /* Address of EWDG instances */
183 /* EWDG0 base address */
184 #define HPM_EWDG0_BASE (0xF00B0000UL)
185 /* EWDG0 base pointer */
186 #define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
187 /* EWDG1 base address */
188 #define HPM_EWDG1_BASE (0xF00B4000UL)
189 /* EWDG1 base pointer */
190 #define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
191 /* PEWDG base address */
192 #define HPM_PEWDG_BASE (0xF4128000UL)
193 /* PEWDG base pointer */
194 #define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
195 
196 #include "hpm_dmamux_regs.h"
197 /* Address of DMAMUX instances */
198 /* DMAMUX base address */
199 #define HPM_DMAMUX_BASE (0xF00C4000UL)
200 /* DMAMUX base pointer */
201 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
202 
203 #include "hpm_dmav2_regs.h"
204 /* Address of DMAV2 instances */
205 /* HDMA base address */
206 #define HPM_HDMA_BASE (0xF00C8000UL)
207 /* HDMA base pointer */
208 #define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
209 
210 #include "hpm_gpiom_regs.h"
211 /* Address of GPIOM instances */
212 /* GPIOM base address */
213 #define HPM_GPIOM_BASE (0xF00D8000UL)
214 /* GPIOM base pointer */
215 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
216 
217 #include "hpm_mcan_regs.h"
218 /* Address of MCAN instances */
219 /* MCAN0 base address */
220 #define HPM_MCAN0_BASE (0xF0280000UL)
221 /* MCAN0 base pointer */
222 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
223 /* MCAN1 base address */
224 #define HPM_MCAN1_BASE (0xF0284000UL)
225 /* MCAN1 base pointer */
226 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
227 /* MCAN2 base address */
228 #define HPM_MCAN2_BASE (0xF0288000UL)
229 /* MCAN2 base pointer */
230 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
231 /* MCAN3 base address */
232 #define HPM_MCAN3_BASE (0xF028C000UL)
233 /* MCAN3 base pointer */
234 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
235 
236 #include "hpm_ptpc_regs.h"
237 /* Address of PTPC instances */
238 /* PTPC base address */
239 #define HPM_PTPC_BASE (0xF02FC000UL)
240 /* PTPC base pointer */
241 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
242 
243 #include "hpm_qeiv2_regs.h"
244 /* Address of QEIV2 instances */
245 /* QEI0 base address */
246 #define HPM_QEI0_BASE (0xF0300000UL)
247 /* QEI0 base pointer */
248 #define HPM_QEI0 ((QEIV2_Type *) HPM_QEI0_BASE)
249 /* QEI1 base address */
250 #define HPM_QEI1_BASE (0xF0304000UL)
251 /* QEI1 base pointer */
252 #define HPM_QEI1 ((QEIV2_Type *) HPM_QEI1_BASE)
253 
254 #include "hpm_qeo_regs.h"
255 /* Address of QEO instances */
256 /* QEO0 base address */
257 #define HPM_QEO0_BASE (0xF0308000UL)
258 /* QEO0 base pointer */
259 #define HPM_QEO0 ((QEO_Type *) HPM_QEO0_BASE)
260 /* QEO1 base address */
261 #define HPM_QEO1_BASE (0xF030C000UL)
262 /* QEO1 base pointer */
263 #define HPM_QEO1 ((QEO_Type *) HPM_QEO1_BASE)
264 
265 #include "hpm_mmc_regs.h"
266 /* Address of MMC instances */
267 /* MMC0 base address */
268 #define HPM_MMC0_BASE (0xF0310000UL)
269 /* MMC0 base pointer */
270 #define HPM_MMC0 ((MMC_Type *) HPM_MMC0_BASE)
271 /* MMC1 base address */
272 #define HPM_MMC1_BASE (0xF0314000UL)
273 /* MMC1 base pointer */
274 #define HPM_MMC1 ((MMC_Type *) HPM_MMC1_BASE)
275 
276 #include "hpm_pwm_regs.h"
277 /* Address of PWM instances */
278 /* PWM0 base address */
279 #define HPM_PWM0_BASE (0xF0318000UL)
280 /* PWM0 base pointer */
281 #define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE)
282 /* PWM1 base address */
283 #define HPM_PWM1_BASE (0xF031C000UL)
284 /* PWM1 base pointer */
285 #define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE)
286 
287 #include "hpm_rdc_regs.h"
288 /* Address of RDC instances */
289 /* RDC base address */
290 #define HPM_RDC_BASE (0xF0320000UL)
291 /* RDC base pointer */
292 #define HPM_RDC ((RDC_Type *) HPM_RDC_BASE)
293 
294 #include "hpm_plb_regs.h"
295 /* Address of PLB instances */
296 /* PLB base address */
297 #define HPM_PLB_BASE (0xF0324000UL)
298 /* PLB base pointer */
299 #define HPM_PLB ((PLB_Type *) HPM_PLB_BASE)
300 
301 #include "hpm_synt_regs.h"
302 /* Address of SYNT instances */
303 /* SYNT base address */
304 #define HPM_SYNT_BASE (0xF0328000UL)
305 /* SYNT base pointer */
306 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
307 
308 #include "hpm_sei_regs.h"
309 /* Address of SEI instances */
310 /* SEI base address */
311 #define HPM_SEI_BASE (0xF032C000UL)
312 /* SEI base pointer */
313 #define HPM_SEI ((SEI_Type *) HPM_SEI_BASE)
314 
315 #include "hpm_trgm_regs.h"
316 /* Address of TRGM instances */
317 /* TRGM0 base address */
318 #define HPM_TRGM0_BASE (0xF033C000UL)
319 /* TRGM0 base pointer */
320 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
321 
322 #include "hpm_usb_regs.h"
323 /* Address of USB instances */
324 /* USB0 base address */
325 #define HPM_USB0_BASE (0xF300C000UL)
326 /* USB0 base pointer */
327 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
328 
329 #include "hpm_sdp_regs.h"
330 /* Address of SDP instances */
331 /* SDP base address */
332 #define HPM_SDP_BASE (0xF3040000UL)
333 /* SDP base pointer */
334 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
335 
336 #include "hpm_sec_regs.h"
337 /* Address of SEC instances */
338 /* SEC base address */
339 #define HPM_SEC_BASE (0xF3044000UL)
340 /* SEC base pointer */
341 #define HPM_SEC ((SEC_Type *) HPM_SEC_BASE)
342 
343 #include "hpm_mon_regs.h"
344 /* Address of MON instances */
345 /* MON base address */
346 #define HPM_MON_BASE (0xF3048000UL)
347 /* MON base pointer */
348 #define HPM_MON ((MON_Type *) HPM_MON_BASE)
349 
350 #include "hpm_rng_regs.h"
351 /* Address of RNG instances */
352 /* RNG base address */
353 #define HPM_RNG_BASE (0xF304C000UL)
354 /* RNG base pointer */
355 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
356 
357 #include "hpm_otp_regs.h"
358 /* Address of OTP instances */
359 /* OTP base address */
360 #define HPM_OTP_BASE (0xF3050000UL)
361 /* OTP base pointer */
362 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
363 
364 #include "hpm_keym_regs.h"
365 /* Address of KEYM instances */
366 /* KEYM base address */
367 #define HPM_KEYM_BASE (0xF3054000UL)
368 /* KEYM base pointer */
369 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
370 
371 #include "hpm_adc16_regs.h"
372 /* Address of ADC16 instances */
373 /* ADC0 base address */
374 #define HPM_ADC0_BASE (0xF3080000UL)
375 /* ADC0 base pointer */
376 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
377 /* ADC1 base address */
378 #define HPM_ADC1_BASE (0xF3084000UL)
379 /* ADC1 base pointer */
380 #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
381 
382 #include "hpm_dac_regs.h"
383 /* Address of DAC instances */
384 /* DAC0 base address */
385 #define HPM_DAC0_BASE (0xF3090000UL)
386 /* DAC0 base pointer */
387 #define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
388 /* DAC1 base address */
389 #define HPM_DAC1_BASE (0xF3094000UL)
390 /* DAC1 base pointer */
391 #define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
392 
393 #include "hpm_opamp_regs.h"
394 /* Address of OPAMP instances */
395 /* OPAMP0 base address */
396 #define HPM_OPAMP0_BASE (0xF30A0000UL)
397 /* OPAMP0 base pointer */
398 #define HPM_OPAMP0 ((OPAMP_Type *) HPM_OPAMP0_BASE)
399 /* OPAMP1 base address */
400 #define HPM_OPAMP1_BASE (0xF30A4000UL)
401 /* OPAMP1 base pointer */
402 #define HPM_OPAMP1 ((OPAMP_Type *) HPM_OPAMP1_BASE)
403 
404 #include "hpm_acmp_regs.h"
405 /* Address of ACMP instances */
406 /* ACMP base address */
407 #define HPM_ACMP_BASE (0xF30B0000UL)
408 /* ACMP base pointer */
409 #define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
410 
411 #include "hpm_sysctl_regs.h"
412 /* Address of SYSCTL instances */
413 /* SYSCTL base address */
414 #define HPM_SYSCTL_BASE (0xF4000000UL)
415 /* SYSCTL base pointer */
416 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
417 
418 #include "hpm_ioc_regs.h"
419 /* Address of IOC instances */
420 /* IOC base address */
421 #define HPM_IOC_BASE (0xF4040000UL)
422 /* IOC base pointer */
423 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
424 /* PIOC base address */
425 #define HPM_PIOC_BASE (0xF4118000UL)
426 /* PIOC base pointer */
427 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
428 
429 #include "hpm_pllctlv2_regs.h"
430 /* Address of PLLCTLV2 instances */
431 /* PLLCTLV2 base address */
432 #define HPM_PLLCTLV2_BASE (0xF40C0000UL)
433 /* PLLCTLV2 base pointer */
434 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
435 
436 #include "hpm_ppor_regs.h"
437 /* Address of PPOR instances */
438 /* PPOR base address */
439 #define HPM_PPOR_BASE (0xF4100000UL)
440 /* PPOR base pointer */
441 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
442 
443 #include "hpm_pcfg_regs.h"
444 /* Address of PCFG instances */
445 /* PCFG base address */
446 #define HPM_PCFG_BASE (0xF4104000UL)
447 /* PCFG base pointer */
448 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
449 
450 #include "hpm_pgpr_regs.h"
451 /* Address of PGPR instances */
452 /* PGPR0 base address */
453 #define HPM_PGPR0_BASE (0xF4110000UL)
454 /* PGPR0 base pointer */
455 #define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
456 /* PGPR1 base address */
457 #define HPM_PGPR1_BASE (0xF4114000UL)
458 /* PGPR1 base pointer */
459 #define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
460 
461 #include "hpm_pdgo_regs.h"
462 /* Address of PDGO instances */
463 /* PDGO base address */
464 #define HPM_PDGO_BASE (0xF4134000UL)
465 /* PDGO base pointer */
466 #define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
467 
468 
469 #include "riscv/riscv_core.h"
470 #include "hpm_csr_regs.h"
471 #include "hpm_interrupt.h"
472 #include "hpm_misc.h"
473 #include "hpm_otp_table.h"
474 #include "hpm_dmamux_src.h"
475 #include "hpm_trgmmux_src.h"
476 #include "hpm_iomux.h"
477 #include "hpm_pmic_iomux.h"
478 #endif /* HPM_SOC_H */