HPM SDK
HPMicro Software Development Kit
hpm_soc.h
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1 /*
2  * Copyright (c) 2021-2025 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_H
10 #define HPM_SOC_H
11 
12 
13 #include "hpm_soc_irq.h"
14 #include "hpm_common.h"
15 
16 #include "hpm_gpio_regs.h"
17 /* Address of GPIO instances */
18 /* FGPIO base address */
19 #define HPM_FGPIO_BASE (0xC0000UL)
20 /* FGPIO base pointer */
21 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
22 /* GPIO0 base address */
23 #define HPM_GPIO0_BASE (0xF0000000UL)
24 /* GPIO0 base pointer */
25 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
26 /* GPIO1 base address */
27 #define HPM_GPIO1_BASE (0xF0004000UL)
28 /* GPIO1 base pointer */
29 #define HPM_GPIO1 ((GPIO_Type *) HPM_GPIO1_BASE)
30 /* PGPIO base address */
31 #define HPM_PGPIO_BASE (0xF40DC000UL)
32 /* PGPIO base pointer */
33 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
34 /* BGPIO base address */
35 #define HPM_BGPIO_BASE (0xF5014000UL)
36 /* BGPIO base pointer */
37 #define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE)
38 
39 /* Address of DM instances */
40 /* DM base address */
41 #define HPM_DM_BASE (0x30000000UL)
42 
43 #include "hpm_plic_regs.h"
44 /* Address of PLIC instances */
45 /* PLIC base address */
46 #define HPM_PLIC_BASE (0xE4000000UL)
47 /* PLIC base pointer */
48 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
49 
50 #include "hpm_mchtmr_regs.h"
51 /* Address of MCHTMR instances */
52 /* MCHTMR base address */
53 #define HPM_MCHTMR_BASE (0xE6000000UL)
54 /* MCHTMR base pointer */
55 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
56 
57 #include "hpm_plic_sw_regs.h"
58 /* Address of PLICSW instances */
59 /* PLICSW base address */
60 #define HPM_PLICSW_BASE (0xE6400000UL)
61 /* PLICSW base pointer */
62 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
63 
64 #include "hpm_gpiom_regs.h"
65 /* Address of GPIOM instances */
66 /* GPIOM base address */
67 #define HPM_GPIOM_BASE (0xF0008000UL)
68 /* GPIOM base pointer */
69 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
70 
71 #include "hpm_adc12_regs.h"
72 /* Address of ADC12 instances */
73 /* ADC0 base address */
74 #define HPM_ADC0_BASE (0xF0010000UL)
75 /* ADC0 base pointer */
76 #define HPM_ADC0 ((ADC12_Type *) HPM_ADC0_BASE)
77 /* ADC1 base address */
78 #define HPM_ADC1_BASE (0xF0014000UL)
79 /* ADC1 base pointer */
80 #define HPM_ADC1 ((ADC12_Type *) HPM_ADC1_BASE)
81 /* ADC2 base address */
82 #define HPM_ADC2_BASE (0xF0018000UL)
83 /* ADC2 base pointer */
84 #define HPM_ADC2 ((ADC12_Type *) HPM_ADC2_BASE)
85 
86 #include "hpm_adc16_regs.h"
87 /* Address of ADC16 instances */
88 /* ADC3 base address */
89 #define HPM_ADC3_BASE (0xF001C000UL)
90 /* ADC3 base pointer */
91 #define HPM_ADC3 ((ADC16_Type *) HPM_ADC3_BASE)
92 
93 #include "hpm_acmp_regs.h"
94 /* Address of ACMP instances */
95 /* ACMP base address */
96 #define HPM_ACMP_BASE (0xF0020000UL)
97 /* ACMP base pointer */
98 #define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
99 
100 #include "hpm_spi_regs.h"
101 /* Address of SPI instances */
102 /* SPI0 base address */
103 #define HPM_SPI0_BASE (0xF0030000UL)
104 /* SPI0 base pointer */
105 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
106 /* SPI1 base address */
107 #define HPM_SPI1_BASE (0xF0034000UL)
108 /* SPI1 base pointer */
109 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
110 /* SPI2 base address */
111 #define HPM_SPI2_BASE (0xF0038000UL)
112 /* SPI2 base pointer */
113 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
114 /* SPI3 base address */
115 #define HPM_SPI3_BASE (0xF003C000UL)
116 /* SPI3 base pointer */
117 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
118 
119 #include "hpm_uart_regs.h"
120 /* Address of UART instances */
121 /* UART0 base address */
122 #define HPM_UART0_BASE (0xF0040000UL)
123 /* UART0 base pointer */
124 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
125 /* UART1 base address */
126 #define HPM_UART1_BASE (0xF0044000UL)
127 /* UART1 base pointer */
128 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
129 /* UART2 base address */
130 #define HPM_UART2_BASE (0xF0048000UL)
131 /* UART2 base pointer */
132 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
133 /* UART3 base address */
134 #define HPM_UART3_BASE (0xF004C000UL)
135 /* UART3 base pointer */
136 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
137 /* UART4 base address */
138 #define HPM_UART4_BASE (0xF0050000UL)
139 /* UART4 base pointer */
140 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
141 /* UART5 base address */
142 #define HPM_UART5_BASE (0xF0054000UL)
143 /* UART5 base pointer */
144 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
145 /* UART6 base address */
146 #define HPM_UART6_BASE (0xF0058000UL)
147 /* UART6 base pointer */
148 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
149 /* UART7 base address */
150 #define HPM_UART7_BASE (0xF005C000UL)
151 /* UART7 base pointer */
152 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
153 /* UART8 base address */
154 #define HPM_UART8_BASE (0xF0060000UL)
155 /* UART8 base pointer */
156 #define HPM_UART8 ((UART_Type *) HPM_UART8_BASE)
157 /* UART9 base address */
158 #define HPM_UART9_BASE (0xF0064000UL)
159 /* UART9 base pointer */
160 #define HPM_UART9 ((UART_Type *) HPM_UART9_BASE)
161 /* UART10 base address */
162 #define HPM_UART10_BASE (0xF0068000UL)
163 /* UART10 base pointer */
164 #define HPM_UART10 ((UART_Type *) HPM_UART10_BASE)
165 /* UART11 base address */
166 #define HPM_UART11_BASE (0xF006C000UL)
167 /* UART11 base pointer */
168 #define HPM_UART11 ((UART_Type *) HPM_UART11_BASE)
169 /* UART12 base address */
170 #define HPM_UART12_BASE (0xF0070000UL)
171 /* UART12 base pointer */
172 #define HPM_UART12 ((UART_Type *) HPM_UART12_BASE)
173 /* UART13 base address */
174 #define HPM_UART13_BASE (0xF0074000UL)
175 /* UART13 base pointer */
176 #define HPM_UART13 ((UART_Type *) HPM_UART13_BASE)
177 /* UART14 base address */
178 #define HPM_UART14_BASE (0xF0078000UL)
179 /* UART14 base pointer */
180 #define HPM_UART14 ((UART_Type *) HPM_UART14_BASE)
181 /* UART15 base address */
182 #define HPM_UART15_BASE (0xF007C000UL)
183 /* UART15 base pointer */
184 #define HPM_UART15 ((UART_Type *) HPM_UART15_BASE)
185 /* PUART base address */
186 #define HPM_PUART_BASE (0xF40E4000UL)
187 /* PUART base pointer */
188 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
189 
190 #include "hpm_can_regs.h"
191 /* Address of CAN instances */
192 /* CAN0 base address */
193 #define HPM_CAN0_BASE (0xF0080000UL)
194 /* CAN0 base pointer */
195 #define HPM_CAN0 ((CAN_Type *) HPM_CAN0_BASE)
196 /* CAN1 base address */
197 #define HPM_CAN1_BASE (0xF0084000UL)
198 /* CAN1 base pointer */
199 #define HPM_CAN1 ((CAN_Type *) HPM_CAN1_BASE)
200 /* CAN2 base address */
201 #define HPM_CAN2_BASE (0xF0088000UL)
202 /* CAN2 base pointer */
203 #define HPM_CAN2 ((CAN_Type *) HPM_CAN2_BASE)
204 /* CAN3 base address */
205 #define HPM_CAN3_BASE (0xF008C000UL)
206 /* CAN3 base pointer */
207 #define HPM_CAN3 ((CAN_Type *) HPM_CAN3_BASE)
208 
209 #include "hpm_wdg_regs.h"
210 /* Address of WDOG instances */
211 /* WDG0 base address */
212 #define HPM_WDG0_BASE (0xF0090000UL)
213 /* WDG0 base pointer */
214 #define HPM_WDG0 ((WDG_Type *) HPM_WDG0_BASE)
215 /* WDG1 base address */
216 #define HPM_WDG1_BASE (0xF0094000UL)
217 /* WDG1 base pointer */
218 #define HPM_WDG1 ((WDG_Type *) HPM_WDG1_BASE)
219 /* WDG2 base address */
220 #define HPM_WDG2_BASE (0xF0098000UL)
221 /* WDG2 base pointer */
222 #define HPM_WDG2 ((WDG_Type *) HPM_WDG2_BASE)
223 /* WDG3 base address */
224 #define HPM_WDG3_BASE (0xF009C000UL)
225 /* WDG3 base pointer */
226 #define HPM_WDG3 ((WDG_Type *) HPM_WDG3_BASE)
227 /* PWDG base address */
228 #define HPM_PWDG_BASE (0xF40E8000UL)
229 /* PWDG base pointer */
230 #define HPM_PWDG ((WDG_Type *) HPM_PWDG_BASE)
231 
232 #include "hpm_mbx_regs.h"
233 /* Address of MBX instances */
234 /* MBX0A base address */
235 #define HPM_MBX0A_BASE (0xF00A0000UL)
236 /* MBX0A base pointer */
237 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
238 /* MBX0B base address */
239 #define HPM_MBX0B_BASE (0xF00A4000UL)
240 /* MBX0B base pointer */
241 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
242 /* MBX1A base address */
243 #define HPM_MBX1A_BASE (0xF00A8000UL)
244 /* MBX1A base pointer */
245 #define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
246 /* MBX1B base address */
247 #define HPM_MBX1B_BASE (0xF00AC000UL)
248 /* MBX1B base pointer */
249 #define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
250 
251 #include "hpm_ptpc_regs.h"
252 /* Address of PTPC instances */
253 /* PTPC base address */
254 #define HPM_PTPC_BASE (0xF00B0000UL)
255 /* PTPC base pointer */
256 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
257 
258 #include "hpm_dmamux_regs.h"
259 /* Address of DMAMUX instances */
260 /* DMAMUX base address */
261 #define HPM_DMAMUX_BASE (0xF00C0000UL)
262 /* DMAMUX base pointer */
263 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
264 
265 #include "hpm_dma_regs.h"
266 /* Address of DMA instances */
267 /* HDMA base address */
268 #define HPM_HDMA_BASE (0xF00C4000UL)
269 /* HDMA base pointer */
270 #define HPM_HDMA ((DMA_Type *) HPM_HDMA_BASE)
271 /* XDMA base address */
272 #define HPM_XDMA_BASE (0xF3048000UL)
273 /* XDMA base pointer */
274 #define HPM_XDMA ((DMA_Type *) HPM_XDMA_BASE)
275 
276 #include "hpm_rng_regs.h"
277 /* Address of RNG instances */
278 /* RNG base address */
279 #define HPM_RNG_BASE (0xF00C8000UL)
280 /* RNG base pointer */
281 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
282 
283 #include "hpm_keym_regs.h"
284 /* Address of KEYM instances */
285 /* KEYM base address */
286 #define HPM_KEYM_BASE (0xF00CC000UL)
287 /* KEYM base pointer */
288 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
289 
290 #include "hpm_i2s_regs.h"
291 /* Address of I2S instances */
292 /* I2S0 base address */
293 #define HPM_I2S0_BASE (0xF0100000UL)
294 /* I2S0 base pointer */
295 #define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
296 /* I2S1 base address */
297 #define HPM_I2S1_BASE (0xF0104000UL)
298 /* I2S1 base pointer */
299 #define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
300 /* I2S2 base address */
301 #define HPM_I2S2_BASE (0xF0108000UL)
302 /* I2S2 base pointer */
303 #define HPM_I2S2 ((I2S_Type *) HPM_I2S2_BASE)
304 /* I2S3 base address */
305 #define HPM_I2S3_BASE (0xF010C000UL)
306 /* I2S3 base pointer */
307 #define HPM_I2S3 ((I2S_Type *) HPM_I2S3_BASE)
308 
309 #include "hpm_dao_regs.h"
310 /* Address of DAO instances */
311 /* DAO base address */
312 #define HPM_DAO_BASE (0xF0110000UL)
313 /* DAO base pointer */
314 #define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
315 
316 #include "hpm_pdm_regs.h"
317 /* Address of PDM instances */
318 /* PDM base address */
319 #define HPM_PDM_BASE (0xF0114000UL)
320 /* PDM base pointer */
321 #define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
322 
323 #include "hpm_pwm_regs.h"
324 /* Address of PWM instances */
325 /* PWM0 base address */
326 #define HPM_PWM0_BASE (0xF0200000UL)
327 /* PWM0 base pointer */
328 #define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE)
329 /* PWM1 base address */
330 #define HPM_PWM1_BASE (0xF0210000UL)
331 /* PWM1 base pointer */
332 #define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE)
333 /* PWM2 base address */
334 #define HPM_PWM2_BASE (0xF0220000UL)
335 /* PWM2 base pointer */
336 #define HPM_PWM2 ((PWM_Type *) HPM_PWM2_BASE)
337 /* PWM3 base address */
338 #define HPM_PWM3_BASE (0xF0230000UL)
339 /* PWM3 base pointer */
340 #define HPM_PWM3 ((PWM_Type *) HPM_PWM3_BASE)
341 
342 #include "hpm_hall_regs.h"
343 /* Address of HALL instances */
344 /* HALL0 base address */
345 #define HPM_HALL0_BASE (0xF0204000UL)
346 /* HALL0 base pointer */
347 #define HPM_HALL0 ((HALL_Type *) HPM_HALL0_BASE)
348 /* HALL1 base address */
349 #define HPM_HALL1_BASE (0xF0214000UL)
350 /* HALL1 base pointer */
351 #define HPM_HALL1 ((HALL_Type *) HPM_HALL1_BASE)
352 /* HALL2 base address */
353 #define HPM_HALL2_BASE (0xF0224000UL)
354 /* HALL2 base pointer */
355 #define HPM_HALL2 ((HALL_Type *) HPM_HALL2_BASE)
356 /* HALL3 base address */
357 #define HPM_HALL3_BASE (0xF0234000UL)
358 /* HALL3 base pointer */
359 #define HPM_HALL3 ((HALL_Type *) HPM_HALL3_BASE)
360 
361 #include "hpm_qei_regs.h"
362 /* Address of QEI instances */
363 /* QEI0 base address */
364 #define HPM_QEI0_BASE (0xF0208000UL)
365 /* QEI0 base pointer */
366 #define HPM_QEI0 ((QEI_Type *) HPM_QEI0_BASE)
367 /* QEI1 base address */
368 #define HPM_QEI1_BASE (0xF0218000UL)
369 /* QEI1 base pointer */
370 #define HPM_QEI1 ((QEI_Type *) HPM_QEI1_BASE)
371 /* QEI2 base address */
372 #define HPM_QEI2_BASE (0xF0228000UL)
373 /* QEI2 base pointer */
374 #define HPM_QEI2 ((QEI_Type *) HPM_QEI2_BASE)
375 /* QEI3 base address */
376 #define HPM_QEI3_BASE (0xF0238000UL)
377 /* QEI3 base pointer */
378 #define HPM_QEI3 ((QEI_Type *) HPM_QEI3_BASE)
379 
380 #include "hpm_trgm_regs.h"
381 /* Address of TRGM instances */
382 /* TRGM0 base address */
383 #define HPM_TRGM0_BASE (0xF020C000UL)
384 /* TRGM0 base pointer */
385 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
386 /* TRGM1 base address */
387 #define HPM_TRGM1_BASE (0xF021C000UL)
388 /* TRGM1 base pointer */
389 #define HPM_TRGM1 ((TRGM_Type *) HPM_TRGM1_BASE)
390 /* TRGM2 base address */
391 #define HPM_TRGM2_BASE (0xF022C000UL)
392 /* TRGM2 base pointer */
393 #define HPM_TRGM2 ((TRGM_Type *) HPM_TRGM2_BASE)
394 /* TRGM3 base address */
395 #define HPM_TRGM3_BASE (0xF023C000UL)
396 /* TRGM3 base pointer */
397 #define HPM_TRGM3 ((TRGM_Type *) HPM_TRGM3_BASE)
398 
399 #include "hpm_synt_regs.h"
400 /* Address of SYNT instances */
401 /* SYNT base address */
402 #define HPM_SYNT_BASE (0xF0240000UL)
403 /* SYNT base pointer */
404 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
405 
406 #include "hpm_lcdc_regs.h"
407 /* Address of LCDC instances */
408 /* LCDC base address */
409 #define HPM_LCDC_BASE (0xF1000000UL)
410 /* LCDC base pointer */
411 #define HPM_LCDC ((LCDC_Type *) HPM_LCDC_BASE)
412 
413 #include "hpm_cam_regs.h"
414 /* Address of CAM instances */
415 /* CAM0 base address */
416 #define HPM_CAM0_BASE (0xF1008000UL)
417 /* CAM0 base pointer */
418 #define HPM_CAM0 ((CAM_Type *) HPM_CAM0_BASE)
419 /* CAM1 base address */
420 #define HPM_CAM1_BASE (0xF100C000UL)
421 /* CAM1 base pointer */
422 #define HPM_CAM1 ((CAM_Type *) HPM_CAM1_BASE)
423 
424 #include "hpm_pdma_regs.h"
425 /* Address of PDMA instances */
426 /* PDMA base address */
427 #define HPM_PDMA_BASE (0xF1010000UL)
428 /* PDMA base pointer */
429 #define HPM_PDMA ((PDMA_Type *) HPM_PDMA_BASE)
430 
431 #include "hpm_jpeg_regs.h"
432 /* Address of JPEG instances */
433 /* JPEG base address */
434 #define HPM_JPEG_BASE (0xF1014000UL)
435 /* JPEG base pointer */
436 #define HPM_JPEG ((JPEG_Type *) HPM_JPEG_BASE)
437 
438 #include "hpm_enet_regs.h"
439 /* Address of ENET instances */
440 /* ENET0 base address */
441 #define HPM_ENET0_BASE (0xF2000000UL)
442 /* ENET0 base pointer */
443 #define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
444 /* ENET1 base address */
445 #define HPM_ENET1_BASE (0xF2004000UL)
446 /* ENET1 base pointer */
447 #define HPM_ENET1 ((ENET_Type *) HPM_ENET1_BASE)
448 
449 #include "hpm_gptmr_regs.h"
450 /* Address of GPTMR instances */
451 /* NTMR0 base address */
452 #define HPM_NTMR0_BASE (0xF2010000UL)
453 /* NTMR0 base pointer */
454 #define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
455 /* NTMR1 base address */
456 #define HPM_NTMR1_BASE (0xF2014000UL)
457 /* NTMR1 base pointer */
458 #define HPM_NTMR1 ((GPTMR_Type *) HPM_NTMR1_BASE)
459 /* GPTMR0 base address */
460 #define HPM_GPTMR0_BASE (0xF3000000UL)
461 /* GPTMR0 base pointer */
462 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
463 /* GPTMR1 base address */
464 #define HPM_GPTMR1_BASE (0xF3004000UL)
465 /* GPTMR1 base pointer */
466 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
467 /* GPTMR2 base address */
468 #define HPM_GPTMR2_BASE (0xF3008000UL)
469 /* GPTMR2 base pointer */
470 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
471 /* GPTMR3 base address */
472 #define HPM_GPTMR3_BASE (0xF300C000UL)
473 /* GPTMR3 base pointer */
474 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
475 /* GPTMR4 base address */
476 #define HPM_GPTMR4_BASE (0xF3010000UL)
477 /* GPTMR4 base pointer */
478 #define HPM_GPTMR4 ((GPTMR_Type *) HPM_GPTMR4_BASE)
479 /* GPTMR5 base address */
480 #define HPM_GPTMR5_BASE (0xF3014000UL)
481 /* GPTMR5 base pointer */
482 #define HPM_GPTMR5 ((GPTMR_Type *) HPM_GPTMR5_BASE)
483 /* GPTMR6 base address */
484 #define HPM_GPTMR6_BASE (0xF3018000UL)
485 /* GPTMR6 base pointer */
486 #define HPM_GPTMR6 ((GPTMR_Type *) HPM_GPTMR6_BASE)
487 /* GPTMR7 base address */
488 #define HPM_GPTMR7_BASE (0xF301C000UL)
489 /* GPTMR7 base pointer */
490 #define HPM_GPTMR7 ((GPTMR_Type *) HPM_GPTMR7_BASE)
491 /* PTMR base address */
492 #define HPM_PTMR_BASE (0xF40E0000UL)
493 /* PTMR base pointer */
494 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
495 
496 #include "hpm_usb_regs.h"
497 /* Address of USB instances */
498 /* USB0 base address */
499 #define HPM_USB0_BASE (0xF2020000UL)
500 /* USB0 base pointer */
501 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
502 /* USB1 base address */
503 #define HPM_USB1_BASE (0xF2024000UL)
504 /* USB1 base pointer */
505 #define HPM_USB1 ((USB_Type *) HPM_USB1_BASE)
506 
507 #include "hpm_sdxc_regs.h"
508 /* Address of SDXC instances */
509 /* SDXC0 base address */
510 #define HPM_SDXC0_BASE (0xF2030000UL)
511 /* SDXC0 base pointer */
512 #define HPM_SDXC0 ((SDXC_Type *) HPM_SDXC0_BASE)
513 /* SDXC1 base address */
514 #define HPM_SDXC1_BASE (0xF2034000UL)
515 /* SDXC1 base pointer */
516 #define HPM_SDXC1 ((SDXC_Type *) HPM_SDXC1_BASE)
517 
518 #include "hpm_conctl_regs.h"
519 /* Address of CONCTL instances */
520 /* CONCTL base address */
521 #define HPM_CONCTL_BASE (0xF2040000UL)
522 /* CONCTL base pointer */
523 #define HPM_CONCTL ((CONCTL_Type *) HPM_CONCTL_BASE)
524 
525 #include "hpm_i2c_regs.h"
526 /* Address of I2C instances */
527 /* I2C0 base address */
528 #define HPM_I2C0_BASE (0xF3020000UL)
529 /* I2C0 base pointer */
530 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
531 /* I2C1 base address */
532 #define HPM_I2C1_BASE (0xF3024000UL)
533 /* I2C1 base pointer */
534 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
535 /* I2C2 base address */
536 #define HPM_I2C2_BASE (0xF3028000UL)
537 /* I2C2 base pointer */
538 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
539 /* I2C3 base address */
540 #define HPM_I2C3_BASE (0xF302C000UL)
541 /* I2C3 base pointer */
542 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
543 
544 #include "hpm_sdp_regs.h"
545 /* Address of SDP instances */
546 /* SDP base address */
547 #define HPM_SDP_BASE (0xF304C000UL)
548 /* SDP base pointer */
549 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
550 
551 #include "hpm_femc_regs.h"
552 /* Address of FEMC instances */
553 /* FEMC base address */
554 #define HPM_FEMC_BASE (0xF3050000UL)
555 /* FEMC base pointer */
556 #define HPM_FEMC ((FEMC_Type *) HPM_FEMC_BASE)
557 
558 #include "hpm_sysctl_regs.h"
559 /* Address of SYSCTL instances */
560 /* SYSCTL base address */
561 #define HPM_SYSCTL_BASE (0xF4000000UL)
562 /* SYSCTL base pointer */
563 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
564 
565 #include "hpm_ioc_regs.h"
566 /* Address of IOC instances */
567 /* IOC base address */
568 #define HPM_IOC_BASE (0xF4040000UL)
569 /* IOC base pointer */
570 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
571 /* PIOC base address */
572 #define HPM_PIOC_BASE (0xF40D8000UL)
573 /* PIOC base pointer */
574 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
575 /* BIOC base address */
576 #define HPM_BIOC_BASE (0xF5010000UL)
577 /* BIOC base pointer */
578 #define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE)
579 
580 #include "hpm_otp_regs.h"
581 /* Address of OTP instances */
582 /* OTPSHW base address */
583 #define HPM_OTPSHW_BASE (0xF4080000UL)
584 /* OTPSHW base pointer */
585 #define HPM_OTPSHW ((OTP_Type *) HPM_OTPSHW_BASE)
586 /* OTP base address */
587 #define HPM_OTP_BASE (0xF40C8000UL)
588 /* OTP base pointer */
589 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
590 
591 #include "hpm_ppor_regs.h"
592 /* Address of PPOR instances */
593 /* PPOR base address */
594 #define HPM_PPOR_BASE (0xF40C0000UL)
595 /* PPOR base pointer */
596 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
597 
598 #include "hpm_pcfg_regs.h"
599 /* Address of PCFG instances */
600 /* PCFG base address */
601 #define HPM_PCFG_BASE (0xF40C4000UL)
602 /* PCFG base pointer */
603 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
604 
605 #include "hpm_psec_regs.h"
606 /* Address of PSEC instances */
607 /* PSEC base address */
608 #define HPM_PSEC_BASE (0xF40CC000UL)
609 /* PSEC base pointer */
610 #define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
611 
612 #include "hpm_pmon_regs.h"
613 /* Address of PMON instances */
614 /* PMON base address */
615 #define HPM_PMON_BASE (0xF40D0000UL)
616 /* PMON base pointer */
617 #define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
618 
619 #include "hpm_pgpr_regs.h"
620 /* Address of PGPR instances */
621 /* PGPR base address */
622 #define HPM_PGPR_BASE (0xF40D4000UL)
623 /* PGPR base pointer */
624 #define HPM_PGPR ((PGPR_Type *) HPM_PGPR_BASE)
625 
626 #include "hpm_vad_regs.h"
627 /* Address of VAD instances */
628 /* VAD base address */
629 #define HPM_VAD_BASE (0xF40EC000UL)
630 /* VAD base pointer */
631 #define HPM_VAD ((VAD_Type *) HPM_VAD_BASE)
632 
633 #include "hpm_pllctl_regs.h"
634 /* Address of PLLCTL instances */
635 /* PLLCTL base address */
636 #define HPM_PLLCTL_BASE (0xF4100000UL)
637 /* PLLCTL base pointer */
638 #define HPM_PLLCTL ((PLLCTL_Type *) HPM_PLLCTL_BASE)
639 
640 #include "hpm_bpor_regs.h"
641 /* Address of BPOR instances */
642 /* BPOR base address */
643 #define HPM_BPOR_BASE (0xF5004000UL)
644 /* BPOR base pointer */
645 #define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE)
646 
647 #include "hpm_bcfg_regs.h"
648 /* Address of BCFG instances */
649 /* BCFG base address */
650 #define HPM_BCFG_BASE (0xF5008000UL)
651 /* BCFG base pointer */
652 #define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE)
653 
654 #include "hpm_butn_regs.h"
655 /* Address of BUTN instances */
656 /* BUTN base address */
657 #define HPM_BUTN_BASE (0xF500C000UL)
658 /* BUTN base pointer */
659 #define HPM_BUTN ((BUTN_Type *) HPM_BUTN_BASE)
660 
661 #include "hpm_bgpr_regs.h"
662 /* Address of BGPR instances */
663 /* BGPR base address */
664 #define HPM_BGPR_BASE (0xF5018000UL)
665 /* BGPR base pointer */
666 #define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE)
667 
668 #include "hpm_rtc_regs.h"
669 /* Address of RTC instances */
670 /* RTCSHW base address */
671 #define HPM_RTCSHW_BASE (0xF501C000UL)
672 /* RTCSHW base pointer */
673 #define HPM_RTCSHW ((RTC_Type *) HPM_RTCSHW_BASE)
674 /* RTC base address */
675 #define HPM_RTC_BASE (0xF5044000UL)
676 /* RTC base pointer */
677 #define HPM_RTC ((RTC_Type *) HPM_RTC_BASE)
678 
679 #include "hpm_bsec_regs.h"
680 /* Address of BSEC instances */
681 /* BSEC base address */
682 #define HPM_BSEC_BASE (0xF5040000UL)
683 /* BSEC base pointer */
684 #define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE)
685 
686 #include "hpm_bkey_regs.h"
687 /* Address of BKEY instances */
688 /* BKEY base address */
689 #define HPM_BKEY_BASE (0xF5048000UL)
690 /* BKEY base pointer */
691 #define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE)
692 
693 #include "hpm_bmon_regs.h"
694 /* Address of BMON instances */
695 /* BMON base address */
696 #define HPM_BMON_BASE (0xF504C000UL)
697 /* BMON base pointer */
698 #define HPM_BMON ((BMON_Type *) HPM_BMON_BASE)
699 
700 #include "hpm_tamp_regs.h"
701 /* Address of TAMP instances */
702 /* TAMP base address */
703 #define HPM_TAMP_BASE (0xF5050000UL)
704 /* TAMP base pointer */
705 #define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE)
706 
707 #include "hpm_mono_regs.h"
708 /* Address of MONO instances */
709 /* MONO base address */
710 #define HPM_MONO_BASE (0xF5054000UL)
711 /* MONO base pointer */
712 #define HPM_MONO ((MONO_Type *) HPM_MONO_BASE)
713 
714 
715 #include "riscv/riscv_core.h"
716 #include "hpm_csr_regs.h"
717 #include "hpm_interrupt.h"
718 #include "hpm_misc.h"
719 #include "hpm_otp_table.h"
720 #include "hpm_dmamux_src.h"
721 #include "hpm_trgmmux_src.h"
722 #include "hpm_iomux.h"
723 #include "hpm_pmic_iomux.h"
724 #include "hpm_batt_iomux.h"
725 #endif /* HPM_SOC_H */