HPM SDK
HPMicro Software Development Kit
hpm_soc.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2021-2025 HPMicro
3
*
4
* SPDX-License-Identifier: BSD-3-Clause
5
*
6
*/
7
8
9
#ifndef HPM_SOC_H
10
#define HPM_SOC_H
11
12
13
#include "
hpm_soc_irq.h
"
14
#include "
hpm_common.h
"
15
16
#include "hpm_gpio_regs.h"
17
/* Address of GPIO instances */
18
/* FGPIO base address */
19
#define HPM_FGPIO_BASE (0xC0000UL)
20
/* FGPIO base pointer */
21
#define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
22
/* GPIO0 base address */
23
#define HPM_GPIO0_BASE (0xF00D0000UL)
24
/* GPIO0 base pointer */
25
#define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
26
/* PGPIO base address */
27
#define HPM_PGPIO_BASE (0xF411C000UL)
28
/* PGPIO base pointer */
29
#define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
30
/* BGPIO base address */
31
#define HPM_BGPIO_BASE (0xF4214000UL)
32
/* BGPIO base pointer */
33
#define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE)
34
35
/* Address of DM instances */
36
/* DM base address */
37
#define HPM_DM_BASE (0x30000000UL)
38
39
#include "hpm_plic_regs.h"
40
/* Address of PLIC instances */
41
/* PLIC base address */
42
#define HPM_PLIC_BASE (0xE4000000UL)
43
/* PLIC base pointer */
44
#define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
45
46
#include "hpm_mchtmr_regs.h"
47
/* Address of MCHTMR instances */
48
/* MCHTMR base address */
49
#define HPM_MCHTMR_BASE (0xE6000000UL)
50
/* MCHTMR base pointer */
51
#define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
52
53
#include "hpm_plic_sw_regs.h"
54
/* Address of PLICSW instances */
55
/* PLICSW base address */
56
#define HPM_PLICSW_BASE (0xE6400000UL)
57
/* PLICSW base pointer */
58
#define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
59
60
#include "hpm_crc_regs.h"
61
/* Address of CRC instances */
62
/* CRC base address */
63
#define HPM_CRC_BASE (0xF000C000UL)
64
/* CRC base pointer */
65
#define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
66
67
#include "hpm_uart_regs.h"
68
/* Address of UART instances */
69
/* UART0 base address */
70
#define HPM_UART0_BASE (0xF0040000UL)
71
/* UART0 base pointer */
72
#define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
73
/* UART1 base address */
74
#define HPM_UART1_BASE (0xF0044000UL)
75
/* UART1 base pointer */
76
#define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
77
/* UART2 base address */
78
#define HPM_UART2_BASE (0xF0048000UL)
79
/* UART2 base pointer */
80
#define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
81
/* UART3 base address */
82
#define HPM_UART3_BASE (0xF004C000UL)
83
/* UART3 base pointer */
84
#define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
85
/* UART4 base address */
86
#define HPM_UART4_BASE (0xF0050000UL)
87
/* UART4 base pointer */
88
#define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
89
/* UART5 base address */
90
#define HPM_UART5_BASE (0xF0054000UL)
91
/* UART5 base pointer */
92
#define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
93
/* UART6 base address */
94
#define HPM_UART6_BASE (0xF0058000UL)
95
/* UART6 base pointer */
96
#define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
97
/* UART7 base address */
98
#define HPM_UART7_BASE (0xF005C000UL)
99
/* UART7 base pointer */
100
#define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
101
/* PUART base address */
102
#define HPM_PUART_BASE (0xF4124000UL)
103
/* PUART base pointer */
104
#define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
105
106
#include "hpm_i2c_regs.h"
107
/* Address of I2C instances */
108
/* I2C0 base address */
109
#define HPM_I2C0_BASE (0xF0060000UL)
110
/* I2C0 base pointer */
111
#define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
112
/* I2C1 base address */
113
#define HPM_I2C1_BASE (0xF0064000UL)
114
/* I2C1 base pointer */
115
#define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
116
/* I2C2 base address */
117
#define HPM_I2C2_BASE (0xF0068000UL)
118
/* I2C2 base pointer */
119
#define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
120
/* I2C3 base address */
121
#define HPM_I2C3_BASE (0xF006C000UL)
122
/* I2C3 base pointer */
123
#define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
124
125
#include "hpm_spi_regs.h"
126
/* Address of SPI instances */
127
/* SPI0 base address */
128
#define HPM_SPI0_BASE (0xF0070000UL)
129
/* SPI0 base pointer */
130
#define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
131
/* SPI1 base address */
132
#define HPM_SPI1_BASE (0xF0074000UL)
133
/* SPI1 base pointer */
134
#define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
135
/* SPI2 base address */
136
#define HPM_SPI2_BASE (0xF0078000UL)
137
/* SPI2 base pointer */
138
#define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
139
/* SPI3 base address */
140
#define HPM_SPI3_BASE (0xF007C000UL)
141
/* SPI3 base pointer */
142
#define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
143
144
#include "hpm_gptmr_regs.h"
145
/* Address of GPTMR instances */
146
/* GPTMR0 base address */
147
#define HPM_GPTMR0_BASE (0xF0080000UL)
148
/* GPTMR0 base pointer */
149
#define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
150
/* GPTMR1 base address */
151
#define HPM_GPTMR1_BASE (0xF0084000UL)
152
/* GPTMR1 base pointer */
153
#define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
154
/* GPTMR2 base address */
155
#define HPM_GPTMR2_BASE (0xF0088000UL)
156
/* GPTMR2 base pointer */
157
#define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
158
/* GPTMR3 base address */
159
#define HPM_GPTMR3_BASE (0xF008C000UL)
160
/* GPTMR3 base pointer */
161
#define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
162
/* GPTMR4 base address */
163
#define HPM_GPTMR4_BASE (0xF0090000UL)
164
/* GPTMR4 base pointer */
165
#define HPM_GPTMR4 ((GPTMR_Type *) HPM_GPTMR4_BASE)
166
/* GPTMR5 base address */
167
#define HPM_GPTMR5_BASE (0xF0094000UL)
168
/* GPTMR5 base pointer */
169
#define HPM_GPTMR5 ((GPTMR_Type *) HPM_GPTMR5_BASE)
170
/* GPTMR6 base address */
171
#define HPM_GPTMR6_BASE (0xF0098000UL)
172
/* GPTMR6 base pointer */
173
#define HPM_GPTMR6 ((GPTMR_Type *) HPM_GPTMR6_BASE)
174
/* GPTMR7 base address */
175
#define HPM_GPTMR7_BASE (0xF009C000UL)
176
/* GPTMR7 base pointer */
177
#define HPM_GPTMR7 ((GPTMR_Type *) HPM_GPTMR7_BASE)
178
/* NTMR0 base address */
179
#define HPM_NTMR0_BASE (0xF1110000UL)
180
/* NTMR0 base pointer */
181
#define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
182
/* PTMR base address */
183
#define HPM_PTMR_BASE (0xF4120000UL)
184
/* PTMR base pointer */
185
#define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
186
187
#include "hpm_mbx_regs.h"
188
/* Address of MBX instances */
189
/* MBX0A base address */
190
#define HPM_MBX0A_BASE (0xF00A0000UL)
191
/* MBX0A base pointer */
192
#define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
193
/* MBX0B base address */
194
#define HPM_MBX0B_BASE (0xF00A4000UL)
195
/* MBX0B base pointer */
196
#define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
197
/* MBX1A base address */
198
#define HPM_MBX1A_BASE (0xF00A8000UL)
199
/* MBX1A base pointer */
200
#define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
201
/* MBX1B base address */
202
#define HPM_MBX1B_BASE (0xF00AC000UL)
203
/* MBX1B base pointer */
204
#define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
205
206
#include "hpm_ewdg_regs.h"
207
/* Address of EWDG instances */
208
/* EWDG0 base address */
209
#define HPM_EWDG0_BASE (0xF00B0000UL)
210
/* EWDG0 base pointer */
211
#define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
212
/* EWDG1 base address */
213
#define HPM_EWDG1_BASE (0xF00B4000UL)
214
/* EWDG1 base pointer */
215
#define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
216
/* PEWDG base address */
217
#define HPM_PEWDG_BASE (0xF4128000UL)
218
/* PEWDG base pointer */
219
#define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
220
221
#include "hpm_dmamux_regs.h"
222
/* Address of DMAMUX instances */
223
/* DMAMUX base address */
224
#define HPM_DMAMUX_BASE (0xF00C4000UL)
225
/* DMAMUX base pointer */
226
#define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
227
228
#include "hpm_dmav2_regs.h"
229
/* Address of DMAV2 instances */
230
/* HDMA base address */
231
#define HPM_HDMA_BASE (0xF00C8000UL)
232
/* HDMA base pointer */
233
#define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
234
/* XDMA base address */
235
#define HPM_XDMA_BASE (0xF3008000UL)
236
/* XDMA base pointer */
237
#define HPM_XDMA ((DMAV2_Type *) HPM_XDMA_BASE)
238
239
#include "hpm_gpiom_regs.h"
240
/* Address of GPIOM instances */
241
/* GPIOM base address */
242
#define HPM_GPIOM_BASE (0xF00D8000UL)
243
/* GPIOM base pointer */
244
#define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
245
246
#include "hpm_adc16_regs.h"
247
/* Address of ADC16 instances */
248
/* ADC0 base address */
249
#define HPM_ADC0_BASE (0xF00E0000UL)
250
/* ADC0 base pointer */
251
#define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
252
253
#include "hpm_i2s_regs.h"
254
/* Address of I2S instances */
255
/* I2S0 base address */
256
#define HPM_I2S0_BASE (0xF0200000UL)
257
/* I2S0 base pointer */
258
#define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
259
/* I2S1 base address */
260
#define HPM_I2S1_BASE (0xF0204000UL)
261
/* I2S1 base pointer */
262
#define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
263
/* I2S2 base address */
264
#define HPM_I2S2_BASE (0xF0208000UL)
265
/* I2S2 base pointer */
266
#define HPM_I2S2 ((I2S_Type *) HPM_I2S2_BASE)
267
/* I2S3 base address */
268
#define HPM_I2S3_BASE (0xF020C000UL)
269
/* I2S3 base pointer */
270
#define HPM_I2S3 ((I2S_Type *) HPM_I2S3_BASE)
271
272
#include "hpm_dao_regs.h"
273
/* Address of DAO instances */
274
/* DAO base address */
275
#define HPM_DAO_BASE (0xF0210000UL)
276
/* DAO base pointer */
277
#define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
278
279
#include "hpm_pdm_regs.h"
280
/* Address of PDM instances */
281
/* PDM base address */
282
#define HPM_PDM_BASE (0xF0214000UL)
283
/* PDM base pointer */
284
#define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
285
286
#include "
hpm_smix_regs.h
"
287
/* Address of SMIX instances */
288
/* SMIX base address */
289
#define HPM_SMIX_BASE (0xF0218000UL)
290
/* SMIX base pointer */
291
#define HPM_SMIX ((SMIX_Type *) HPM_SMIX_BASE)
292
293
#include "hpm_mcan_regs.h"
294
/* Address of MCAN instances */
295
/* MCAN0 base address */
296
#define HPM_MCAN0_BASE (0xF0280000UL)
297
/* MCAN0 base pointer */
298
#define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
299
/* MCAN1 base address */
300
#define HPM_MCAN1_BASE (0xF0284000UL)
301
/* MCAN1 base pointer */
302
#define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
303
/* MCAN2 base address */
304
#define HPM_MCAN2_BASE (0xF0288000UL)
305
/* MCAN2 base pointer */
306
#define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
307
/* MCAN3 base address */
308
#define HPM_MCAN3_BASE (0xF028C000UL)
309
/* MCAN3 base pointer */
310
#define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
311
/* MCAN4 base address */
312
#define HPM_MCAN4_BASE (0xF0290000UL)
313
/* MCAN4 base pointer */
314
#define HPM_MCAN4 ((MCAN_Type *) HPM_MCAN4_BASE)
315
/* MCAN5 base address */
316
#define HPM_MCAN5_BASE (0xF0294000UL)
317
/* MCAN5 base pointer */
318
#define HPM_MCAN5 ((MCAN_Type *) HPM_MCAN5_BASE)
319
/* MCAN6 base address */
320
#define HPM_MCAN6_BASE (0xF0298000UL)
321
/* MCAN6 base pointer */
322
#define HPM_MCAN6 ((MCAN_Type *) HPM_MCAN6_BASE)
323
/* MCAN7 base address */
324
#define HPM_MCAN7_BASE (0xF029C000UL)
325
/* MCAN7 base pointer */
326
#define HPM_MCAN7 ((MCAN_Type *) HPM_MCAN7_BASE)
327
328
#include "hpm_ptpc_regs.h"
329
/* Address of PTPC instances */
330
/* PTPC base address */
331
#define HPM_PTPC_BASE (0xF02FC000UL)
332
/* PTPC base pointer */
333
#define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
334
335
#include "hpm_lcdc_regs.h"
336
/* Address of LCDC instances */
337
/* LCDC base address */
338
#define HPM_LCDC_BASE (0xF1000000UL)
339
/* LCDC base pointer */
340
#define HPM_LCDC ((LCDC_Type *) HPM_LCDC_BASE)
341
/* LCDC1 base address */
342
#define HPM_LCDC1_BASE (0xF1004000UL)
343
/* LCDC1 base pointer */
344
#define HPM_LCDC1 ((LCDC_Type *) HPM_LCDC1_BASE)
345
346
#include "hpm_cam_regs.h"
347
/* Address of CAM instances */
348
/* CAM0 base address */
349
#define HPM_CAM0_BASE (0xF1008000UL)
350
/* CAM0 base pointer */
351
#define HPM_CAM0 ((CAM_Type *) HPM_CAM0_BASE)
352
/* CAM1 base address */
353
#define HPM_CAM1_BASE (0xF100C000UL)
354
/* CAM1 base pointer */
355
#define HPM_CAM1 ((CAM_Type *) HPM_CAM1_BASE)
356
357
#include "hpm_pdma_regs.h"
358
/* Address of PDMA instances */
359
/* PDMA base address */
360
#define HPM_PDMA_BASE (0xF1010000UL)
361
/* PDMA base pointer */
362
#define HPM_PDMA ((PDMA_Type *) HPM_PDMA_BASE)
363
364
#include "hpm_jpeg_regs.h"
365
/* Address of JPEG instances */
366
/* JPEG base address */
367
#define HPM_JPEG_BASE (0xF1014000UL)
368
/* JPEG base pointer */
369
#define HPM_JPEG ((JPEG_Type *) HPM_JPEG_BASE)
370
371
#include "
hpm_gwc_regs.h
"
372
/* Address of GWC instances */
373
/* GWC0 base address */
374
#define HPM_GWC0_BASE (0xF1018000UL)
375
/* GWC0 base pointer */
376
#define HPM_GWC0 ((GWC_Type *) HPM_GWC0_BASE)
377
/* GWC1 base address */
378
#define HPM_GWC1_BASE (0xF101C000UL)
379
/* GWC1 base pointer */
380
#define HPM_GWC1 ((GWC_Type *) HPM_GWC1_BASE)
381
382
#include "
hpm_mipi_dsi_regs.h
"
383
/* Address of MIPI_DSI instances */
384
/* MIPI_DSI0 base address */
385
#define HPM_MIPI_DSI0_BASE (0xF1020000UL)
386
/* MIPI_DSI0 base pointer */
387
#define HPM_MIPI_DSI0 ((MIPI_DSI_Type *) HPM_MIPI_DSI0_BASE)
388
/* MIPI_DSI1 base address */
389
#define HPM_MIPI_DSI1_BASE (0xF1024000UL)
390
/* MIPI_DSI1 base pointer */
391
#define HPM_MIPI_DSI1 ((MIPI_DSI_Type *) HPM_MIPI_DSI1_BASE)
392
393
#include "
hpm_mipi_csi_regs.h
"
394
/* Address of MIPI_CSI instances */
395
/* MIPI_CSI0 base address */
396
#define HPM_MIPI_CSI0_BASE (0xF1028000UL)
397
/* MIPI_CSI0 base pointer */
398
#define HPM_MIPI_CSI0 ((MIPI_CSI_Type *) HPM_MIPI_CSI0_BASE)
399
/* MIPI_CSI1 base address */
400
#define HPM_MIPI_CSI1_BASE (0xF102C000UL)
401
/* MIPI_CSI1 base pointer */
402
#define HPM_MIPI_CSI1 ((MIPI_CSI_Type *) HPM_MIPI_CSI1_BASE)
403
404
#include "
hpm_lvb_regs.h
"
405
/* Address of LVB instances */
406
/* LVB base address */
407
#define HPM_LVB_BASE (0xF1030000UL)
408
/* LVB base pointer */
409
#define HPM_LVB ((LVB_Type *) HPM_LVB_BASE)
410
411
#include "
hpm_pixelmux_regs.h
"
412
/* Address of PIXELMUX instances */
413
/* PIXEL_MUX base address */
414
#define HPM_PIXEL_MUX_BASE (0xF1034000UL)
415
/* PIXEL_MUX base pointer */
416
#define HPM_PIXEL_MUX ((PIXELMUX_Type *) HPM_PIXEL_MUX_BASE)
417
418
#include "
hpm_lcb_regs.h
"
419
/* Address of LCB instances */
420
/* LCB base address */
421
#define HPM_LCB_BASE (0xF1038000UL)
422
/* LCB base pointer */
423
#define HPM_LCB ((LCB_Type *) HPM_LCB_BASE)
424
425
#include "
hpm_gpu_regs.h
"
426
/* Address of GPU instances */
427
/* GPU base address */
428
#define HPM_GPU_BASE (0xF1080000UL)
429
/* GPU base pointer */
430
#define HPM_GPU ((GPU_Type *) HPM_GPU_BASE)
431
432
#include "hpm_enet_regs.h"
433
/* Address of ENET instances */
434
/* ENET0 base address */
435
#define HPM_ENET0_BASE (0xF1100000UL)
436
/* ENET0 base pointer */
437
#define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
438
439
#include "hpm_usb_regs.h"
440
/* Address of USB instances */
441
/* USB0 base address */
442
#define HPM_USB0_BASE (0xF1120000UL)
443
/* USB0 base pointer */
444
#define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
445
446
#include "hpm_sdxc_regs.h"
447
/* Address of SDXC instances */
448
/* SDXC0 base address */
449
#define HPM_SDXC0_BASE (0xF1130000UL)
450
/* SDXC0 base pointer */
451
#define HPM_SDXC0 ((SDXC_Type *) HPM_SDXC0_BASE)
452
/* SDXC1 base address */
453
#define HPM_SDXC1_BASE (0xF1134000UL)
454
/* SDXC1 base pointer */
455
#define HPM_SDXC1 ((SDXC_Type *) HPM_SDXC1_BASE)
456
457
#include "
hpm_ddrctl_regs.h
"
458
/* Address of DDRCTL instances */
459
/* DDRCTL base address */
460
#define HPM_DDRCTL_BASE (0xF3010000UL)
461
/* DDRCTL base pointer */
462
#define HPM_DDRCTL ((DDRCTL_Type *) HPM_DDRCTL_BASE)
463
464
#include "hpm_ffa_regs.h"
465
/* Address of FFA instances */
466
/* FFA base address */
467
#define HPM_FFA_BASE (0xF3018000UL)
468
/* FFA base pointer */
469
#define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
470
471
#include "hpm_sdp_regs.h"
472
/* Address of SDP instances */
473
/* SDP base address */
474
#define HPM_SDP_BASE (0xF3040000UL)
475
/* SDP base pointer */
476
#define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
477
478
#include "hpm_sec_regs.h"
479
/* Address of SEC instances */
480
/* SEC base address */
481
#define HPM_SEC_BASE (0xF3044000UL)
482
/* SEC base pointer */
483
#define HPM_SEC ((SEC_Type *) HPM_SEC_BASE)
484
485
#include "hpm_mon_regs.h"
486
/* Address of MON instances */
487
/* MON base address */
488
#define HPM_MON_BASE (0xF3048000UL)
489
/* MON base pointer */
490
#define HPM_MON ((MON_Type *) HPM_MON_BASE)
491
492
#include "hpm_rng_regs.h"
493
/* Address of RNG instances */
494
/* RNG base address */
495
#define HPM_RNG_BASE (0xF304C000UL)
496
/* RNG base pointer */
497
#define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
498
499
#include "hpm_otp_regs.h"
500
/* Address of OTP instances */
501
/* OTP base address */
502
#define HPM_OTP_BASE (0xF3050000UL)
503
/* OTP base pointer */
504
#define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
505
506
#include "hpm_keym_regs.h"
507
/* Address of KEYM instances */
508
/* KEYM base address */
509
#define HPM_KEYM_BASE (0xF3054000UL)
510
/* KEYM base pointer */
511
#define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
512
513
#include "hpm_sysctl_regs.h"
514
/* Address of SYSCTL instances */
515
/* SYSCTL base address */
516
#define HPM_SYSCTL_BASE (0xF4000000UL)
517
/* SYSCTL base pointer */
518
#define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
519
520
#include "hpm_ioc_regs.h"
521
/* Address of IOC instances */
522
/* IOC base address */
523
#define HPM_IOC_BASE (0xF4040000UL)
524
/* IOC base pointer */
525
#define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
526
/* PIOC base address */
527
#define HPM_PIOC_BASE (0xF4118000UL)
528
/* PIOC base pointer */
529
#define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
530
/* BIOC base address */
531
#define HPM_BIOC_BASE (0xF4210000UL)
532
/* BIOC base pointer */
533
#define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE)
534
535
#include "hpm_pllctlv2_regs.h"
536
/* Address of PLLCTLV2 instances */
537
/* PLLCTLV2 base address */
538
#define HPM_PLLCTLV2_BASE (0xF40C0000UL)
539
/* PLLCTLV2 base pointer */
540
#define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
541
542
#include "hpm_ppor_regs.h"
543
/* Address of PPOR instances */
544
/* PPOR base address */
545
#define HPM_PPOR_BASE (0xF4100000UL)
546
/* PPOR base pointer */
547
#define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
548
549
#include "hpm_pcfg_regs.h"
550
/* Address of PCFG instances */
551
/* PCFG base address */
552
#define HPM_PCFG_BASE (0xF4104000UL)
553
/* PCFG base pointer */
554
#define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
555
556
#include "hpm_pgpr_regs.h"
557
/* Address of PGPR instances */
558
/* PGPR0 base address */
559
#define HPM_PGPR0_BASE (0xF4110000UL)
560
/* PGPR0 base pointer */
561
#define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
562
/* PGPR1 base address */
563
#define HPM_PGPR1_BASE (0xF4114000UL)
564
/* PGPR1 base pointer */
565
#define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
566
567
#include "hpm_vad_regs.h"
568
/* Address of VAD instances */
569
/* VAD base address */
570
#define HPM_VAD_BASE (0xF412C000UL)
571
/* VAD base pointer */
572
#define HPM_VAD ((VAD_Type *) HPM_VAD_BASE)
573
574
#include "
hpm_mipi_dsi_phy_regs.h
"
575
/* Address of MIPI_DSI_PHY instances */
576
/* MIPI_DSI_PHY0 base address */
577
#define HPM_MIPI_DSI_PHY0_BASE (0xF4140000UL)
578
/* MIPI_DSI_PHY0 base pointer */
579
#define HPM_MIPI_DSI_PHY0 ((MIPI_DSI_PHY_Type *) HPM_MIPI_DSI_PHY0_BASE)
580
/* MIPI_DSI_PHY1 base address */
581
#define HPM_MIPI_DSI_PHY1_BASE (0xF4144000UL)
582
/* MIPI_DSI_PHY1 base pointer */
583
#define HPM_MIPI_DSI_PHY1 ((MIPI_DSI_PHY_Type *) HPM_MIPI_DSI_PHY1_BASE)
584
585
#include "
hpm_mipi_csi_phy_regs.h
"
586
/* Address of MIPI_CSI_PHY instances */
587
/* MIPI_CSI_PHY0 base address */
588
#define HPM_MIPI_CSI_PHY0_BASE (0xF4148000UL)
589
/* MIPI_CSI_PHY0 base pointer */
590
#define HPM_MIPI_CSI_PHY0 ((MIPI_CSI_PHY_Type *) HPM_MIPI_CSI_PHY0_BASE)
591
/* MIPI_CSI_PHY1 base address */
592
#define HPM_MIPI_CSI_PHY1_BASE (0xF414C000UL)
593
/* MIPI_CSI_PHY1 base pointer */
594
#define HPM_MIPI_CSI_PHY1 ((MIPI_CSI_PHY_Type *) HPM_MIPI_CSI_PHY1_BASE)
595
596
#include "
hpm_ddrphy_regs.h
"
597
/* Address of DDRPHY instances */
598
/* DDRPHY base address */
599
#define HPM_DDRPHY_BASE (0xF4150000UL)
600
/* DDRPHY base pointer */
601
#define HPM_DDRPHY ((DDRPHY_Type *) HPM_DDRPHY_BASE)
602
603
#include "hpm_tsns_regs.h"
604
/* Address of TSNS instances */
605
/* TSNS base address */
606
#define HPM_TSNS_BASE (0xF4154000UL)
607
/* TSNS base pointer */
608
#define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
609
610
#include "hpm_bacc_regs.h"
611
/* Address of BACC instances */
612
/* BACC base address */
613
#define HPM_BACC_BASE (0xF4200000UL)
614
/* BACC base pointer */
615
#define HPM_BACC ((BACC_Type *) HPM_BACC_BASE)
616
617
#include "hpm_bpor_regs.h"
618
/* Address of BPOR instances */
619
/* BPOR base address */
620
#define HPM_BPOR_BASE (0xF4204000UL)
621
/* BPOR base pointer */
622
#define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE)
623
624
#include "hpm_bcfg_regs.h"
625
/* Address of BCFG instances */
626
/* BCFG base address */
627
#define HPM_BCFG_BASE (0xF4208000UL)
628
/* BCFG base pointer */
629
#define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE)
630
631
#include "hpm_bgpr_regs.h"
632
/* Address of BGPR instances */
633
/* BGPR base address */
634
#define HPM_BGPR_BASE (0xF4218000UL)
635
/* BGPR base pointer */
636
#define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE)
637
638
#include "hpm_rtc_regs.h"
639
/* Address of RTC instances */
640
/* RTCSHW base address */
641
#define HPM_RTCSHW_BASE (0xF421C000UL)
642
/* RTCSHW base pointer */
643
#define HPM_RTCSHW ((RTC_Type *) HPM_RTCSHW_BASE)
644
/* RTC base address */
645
#define HPM_RTC_BASE (0xF4244000UL)
646
/* RTC base pointer */
647
#define HPM_RTC ((RTC_Type *) HPM_RTC_BASE)
648
649
#include "hpm_bsec_regs.h"
650
/* Address of BSEC instances */
651
/* BSEC base address */
652
#define HPM_BSEC_BASE (0xF4240000UL)
653
/* BSEC base pointer */
654
#define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE)
655
656
#include "hpm_bkey_regs.h"
657
/* Address of BKEY instances */
658
/* BKEY base address */
659
#define HPM_BKEY_BASE (0xF4248000UL)
660
/* BKEY base pointer */
661
#define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE)
662
663
#include "hpm_bmon_regs.h"
664
/* Address of BMON instances */
665
/* BMON base address */
666
#define HPM_BMON_BASE (0xF424C000UL)
667
/* BMON base pointer */
668
#define HPM_BMON ((BMON_Type *) HPM_BMON_BASE)
669
670
#include "hpm_tamp_regs.h"
671
/* Address of TAMP instances */
672
/* TAMP base address */
673
#define HPM_TAMP_BASE (0xF4250000UL)
674
/* TAMP base pointer */
675
#define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE)
676
677
#include "hpm_mono_regs.h"
678
/* Address of MONO instances */
679
/* MONO base address */
680
#define HPM_MONO_BASE (0xF4254000UL)
681
/* MONO base pointer */
682
#define HPM_MONO ((MONO_Type *) HPM_MONO_BASE)
683
684
685
#include "
riscv/riscv_core.h
"
686
#include "
hpm_csr_regs.h
"
687
#include "
hpm_interrupt.h
"
688
#include "
hpm_misc.h
"
689
#include "
hpm_otp_table.h
"
690
#include "
hpm_dmamux_src.h
"
691
#include "
hpm_iomux.h
"
692
#include "
hpm_pmic_iomux.h
"
693
#include "
hpm_batt_iomux.h
"
694
#endif
/* HPM_SOC_H */
hpm_batt_iomux.h
hpm_csr_regs.h
hpm_dmamux_src.h
hpm_interrupt.h
hpm_iomux.h
hpm_misc.h
hpm_otp_table.h
hpm_pmic_iomux.h
hpm_soc_irq.h
hpm_common.h
hpm_ddrctl_regs.h
hpm_ddrphy_regs.h
hpm_gpu_regs.h
hpm_gwc_regs.h
hpm_lcb_regs.h
hpm_lvb_regs.h
hpm_mipi_csi_phy_regs.h
hpm_mipi_csi_regs.h
hpm_mipi_dsi_phy_regs.h
hpm_mipi_dsi_regs.h
hpm_pixelmux_regs.h
hpm_smix_regs.h
riscv_core.h
soc
HPM6800
HPM6880
hpm_soc.h
Generated on Tue Apr 1 2025 05:30:26 for HPM SDK by
1.9.1